USB superspeed peripherals Forum Discussions
Hi, I'm going to use AN75779 Version *B on our environment for following system, Sensor Size: SXGA(1024 x 1280) Sensor frame rate: 60 fps [GPIF II Setting] 16bit 100MHz How do I have to customize AN75779 source code ? When I use AN75779 with no customize, following error has been displayed. CyU3PDmaMultiChannelCommitBuffer() ---> Err71 If enabling flag BACKFLOW_DETECT, "Backflow detected" message was displayed on terminal output, and "cbArg" are 0x1005 and 0x1006 by turns. I think that I could customize GPIF II setting for 16bit mode. We'd like to know how to customize for Sensor size and frame rate settings. Regards, ChibiNoriderShow Less
Hello,
I have develop a slave FIFO streaming application based on FX3 with one isochronous IN EP (0x83, burst size = 16). On Windows it works well (Data rate 125MByte/s). Now, i port it to Linux using libusb 1.0 and get a data rate of about 8MByte/s only. I try several kernels (2.6, 3.2, 3.5, 3.8) but it seems that a burst size > 1 isn't supported by the super speed host controller.
Did someone successfully create a Linux streaming application with burst size > 1? Any ideas?
Thanks
Show LessHello
In addition to add 2 threads (ep2 out/in) on the basis of fireware of your provided to achieve four threads though the FPGA <=> FX3 GPIF2 <=> FX3 EP1 OUT/ IN, EP2 OUT/IN <=> PC ,I know how to configure the descriptor about eps, but I don't know what should i do in .c file to configure DMA pipe between ep2 and gpif2, we use DMA_AUTO_TYPE, can i copy the DMA configuration code about ep1, just configuring endpoints and dma channel, as
CyU3PEpConfig_t epCfg_1;CyU3PDmaChannelConfig_t dmaCfg_1;CyU3PEpConfig_t epCfg_2;CyU3PDmaChannelConfig_t dmaCfg_2;
configure PIB and UIB socket 2
Show LessHi everybody
If my FX3 is working in slave-mode fifo, can i change the PCLK on the fly.
I have half of my data streaming at 27MHZ and other half at 54MHz. Can i change the PCLK immediately. Is there a way to implement such a thing?
I am thinking everything happens on the rising clock edge, so how plausable is to do this?
regards
Mirza
Show LessHi,
I found that sometimes the waveform generated by GPIFII designer can't work properly, after I changed the state machine and input/output signals many times, the SM is stuck at a certain state (I can check this by EP0 request). However, if I create a new project and "copy" the signal configure and state machine, then the generated waveform can work properly.
And sometimes the designer can't simulate the waveform correctly, by reporting transition errors, but the waveform can work properly.
Is there any updated version of this tool?
Show LessNo I have the FX3 DVK board connected to our FPGA board and try to set up the sync slave FIFO connetion. If I send data from host to the OUT EP, the FX3 delivers 2 additional words before the transmitted data. How can I setup the FX3 correctly to avoid this? I set up the endpoints and sockets in this way:
#define CY_FX_EP_PRODUCER 0x06 /* EP 6 OUT */
#define CY_FX_EP_CONSUMER 0x82 /* EP 2 IN */
#define CY_FX_EP_PRODUCER_USB_SOCKET 0x06 /* USB Socket 6 is producer */
#define CY_FX_EP_CONSUMER_USB_SOCKET 0x02 /* USB Socket 2 is consumer */
/* Used on FX3 silicon. */
#define CY_FX_EP_PRODUCER_PPORT_SOCKET CY_U3P_PIB_SOCKET_0 /* P-port Socket 0 is producer */
#define CY_FX_EP_CONSUMER_PPORT_SOCKET CY_U3P_PIB_SOCKET_1 /* P-port Socket 1 is consumer */
And set up the GPIF II to connect the flags fixed to the threads:
{CY_U3P_PIB_GPIF_CTRL_BUS_SELECT_ADDRESS(4) , 0x00000011}, //FLAGA = Fixed to Thread 1
{CY_U3P_PIB_GPIF_CTRL_BUS_SELECT_ADDRESS(5) , 0x00000010}, //FLAGB = Fixed to Thread 0
This works well, but there are 2 cycles with 0x0000 data in the FIFO. Do I have to use the partial flags with watermark value? Is yes, how to configure?
Attached you can find the ChipScope output for this beha
Show LessI used AN75779(How to Implement an Image Sensor Interface with EZ-USB® FX3™ in a USB) Source.
CyU3PDmaMultiChannelSetWrapUp() function is succeed. But Sometimes CyFxUvcApplnDmaCallback() isn't called.
So losing about 2 frame per second, 28 frame appears.
Please help me.
Thanks.
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