USB superspeed peripherals Forum Discussions
Hello
Couple Questions.
1) Clarification question on the Vramp spec. The Voltage Ramp on my supplies which are 3.3V and 1.2V need to be monotonic. That means the just need to have a smooth and consistent rise rate. They do not have to have the same ramp rate? Basically my 3.3V and 1.2V will reach these levels at the same time and therefore their rise rate will be different.
2) What is the current draw on the VBUS and VBATT pins? The Vbus pin states it has an internal regulator to power the USB I/O pins? Since I'm only using the USB 2.0 function I don't know what the current draw is on these 2 pins?
Thanks
Gary
Show LessHello
Thank you for your help
If I am writing data into the Slave FIFO and I hit the 512 endpoint buffer size is there an auto increment mode whereby the FIFOADDR0 and 1 are internally incremented? If I keep writing into the same endpoint buffer will my data get overwritten?
See in our FX2 design we are able to externally just keep FIFOADDR 0 and 1 tied to a 0 but we keep writing data into the FIFO and it internally increments the buffer. Is this possible in the FX3?
Regards
Gary
Show LessHello
There is an eMMC connected on S0 of my FX3S. I have a "storage partition" in the user data section and implemented block rd/wr and byte rd/wr functions which are visible to my PC API.
Based on these functions, I want to establish a very simple file system on PC side. No visibility in the windows file system is required just some very basic functions in the application (as: make file system, read dir, write file, read file, erase file). Wear levelling is not required, as this is handled by the eMMC itself.
I'm sure that others of you using the FX3S did similar things, so: What kind of file systems did you take? Which are your favourites?
Thanks for your hints!
Show LessHi All,
I am trying to include the 'cyAPI.lib' from the x64 library folder of "1.3" FX3 SDK installation location and trying to build a DLL wrapper in Visual Studio Express 2013 for Windows Desktop.
I am facing a linker error "LNK2001, unresolved external symbol _imp_SetupDi..." while trying to build. Please find the attached snapshot for more details. Please help me on the same.
Thanks,
KCN
Show LessHi all,
I modified the USB descriptors of my project in order to have 2 Alternate setting into the Standard High Speed Configuration Descriptor. The 2 Alternate Setting Index are 0 and 1 (obviously).
If I try to open the device (in USB2.0 mode, since the Alternate Setting is not present in USB3.0 descriptor) with Alternate Setting Index 0 all is fine, if I try Alternate Setting Index 1 the device stalls the request. I'm reasonably sure that the descriptor is correct.
I don't know if I miss something in the code, since I based my code on an application note that have only one Alternate Setting.
Can someone point me to a sample code where multiple alternate settings are managed? I see that all FX3 examples into SDK use only one Alternate Setting...
Thanks a lot!
Show LessHi!
We are developing a custom camera with FX3 and have successfully gotten the hardware to work in some of the allowed video resolutions after following the UVC example (AN75779). We need to write to the sensor registers every time we want to change camera resolution. Currently we have hard-coded each register, and its actual value for each resolution that is supported. Can we not read these register addresses and values from a text (.ini) file? If possible, can anyone kindly give me some ideas on how to go about it?
Since I am new to this forum, this might be a repeat question. If so, kindly just point out the earlier thread that has the answer. I did a simple search and could not find the answer.
Thanks in advance for your help and suggestions.
Show LessDear Support Team,
As per FX3 Data Sheet (http://www.cypress.com/file/140296/download) Pin Description (Page 17, Table 7. CYUSB3012 and CYUSB3014 Pin List), RESET# signal is connected to “CVDDQ” IO Bank.
But, As per FX3 Schematics (http://www.cypress.com/file/114711/download), RESET# signal is connected to “VIO1” IO Bank, though it is pulled high with "CVDDQ" supply.
Is there a mistake in the FX3 Schematics ??
Thanks,
KCNGP
Show LessHi,
I newbie to use this FX3 USB Superspeed.
I have build so call SPI Flash Programmer using FTDI and now I want to use this FX3 as well.
Do you have ready example to do that? Thanks.
Regards,
ir1sul
Show LessIs it possible to use the Mictor connectors on the development board as the interface to the device instead of the samtec expansion connector?
I have a Xilinx FPGA board which outputs the data through a Mictor interface and I would like to connect it to the development board using a Mictor-to-Mictor cable.
Show LessHello all!
I have problem to configure project AN65974 into Xilinx FPGA Spartan-6 on board USRP B210 over JTAG-connector by using iMPACT.
iMPACT error massage is below:
"INFO:iMPACT - '1': Checking done pin....done.
'1': Programming terminated. DONE did not go high.
PROGRAM FAILED"
When I use project AN84868 or AN87216, everything is fine. My bit-file is loaded into FPGA perfectly.
In my opinion, that problem is in signals FPGA_CFG_INIT_B, FPGA_CFG_DONE, FPGA_CFG_PROG_B and these signals into code of AN65974.
Simplified table of connections is below:
FPGA/pin SIGNAL CYUSB3014/pin
FPGA/INIT_B FPGA_CFG_INIT_B CYUSB3014/GPIO[45]
FPGA/DONE FPGA_CFG_DONE CYUSB3014/CTL[10]
FPGA/PROGRAM_B_2 FPGA_CFG_PROG_B CYUSB3014/GPIO[45]
Is it true? Perhaps I must to do some modifications of code. What? Could you help me here?
Thanks in advance for any response!
Regapds,
Evgeniy
Two files are in this mail: b200_sch.pdf and AN65974_SlaveFifoSync_origin.zip