USB superspeed peripherals Forum Discussions

Hi Guys,

Need your help regarding an UART issue I'm having in my custom board design.

I've burned the onboard I2C EEPROM with SlaveFifo example (from AN65974), with several

CyU3PDebugPrint() of my own. In this case I see my debug info printed on UART on a terminal.

However, when I'm burning the FPGA programming example (from AN84868), with

 several debug messages of my own, I see no any UART debug info on terminal, even

after I have successfully programmed the onboard FPGA.

I probably missing something obvious here, but up to this point, can't really understand

what might be the reason to absence of debug messages?

Please let me know if you need more details to understand the root cause.

Thank you in advance.

The FX3 SDK ticks appear to be 1.024ms, not 1ms.    For example, a test thread thus:

    

    int state =0;
    for(;;)
    {
        CyU3PGpioSimpleSetValue(GPIO_STATUS_LED, state);
        state ^=1;
        CyU3PThreadSleep(1000);
    }

   

This toggles the output at 512millihertz.   Changing the sleep to 1024 toggles at the expected 500millihertz.

 How can we correct the FX3 setup to tick properly at the documented 1ms?

I design a USB 3.0 IO card with a USB 3.0 standard TYPE-A receptacle and CYUSB3014BZXI. when I route my PCB, I find the differential pairs cross each other.In AN70707,it says "The polarity can be swapped on the USB 3.0 differential pairs."，so I want build the traces(STDA_SSTX-,SSTXP),(STDA_SSTX+,SSTXM),(STDA_SSRX-,SSRXM),(STDA_SSRX+,SSRXP).it means that I swap the SSTX, don't swap the SSRX.but in DVK, cypress swaps the SSRX, doesn't swap the SSTX.

so please tell me, my design can work fine?

The problem that we have observed is that when doing large transfers (bigger than the buffer space available on the fx3) if the pc has a high cpu load it has be seen to struggle to keep up with transfers. This causes the input to the dma buffers to catch up with the output and causes an error. This can be recovered from and the transfer can be started again, however the first transfer was still a failure. In time dependent applications this can cause issues as the usb timeout set on the pc has to wait to elapse before a new transfer is initiated.

The DMA watermark is well documented with regard to using hardware flags but due to the aforementioned problem we have a requirement where the DMA watermark needs to generate an interrupt/callback.  We have sufficient time to take action to slow down the transfer into the gpif block if we are running out of buffer space but this has to be done in firmware. Our application is using an auto many to one dma channel from 2 pib sockets to one usb endpoint socket, with the gpif configured to have a 16bit data bus with data clocked in from an external source. The transfer is of known finite size, though that size can vary from transfer to transfer, but it always begins with data placed into the same socket (0). We can poll the DMA transfer status to get the number of produced buffers and the number of consumed buffers, however this is processor intensive and  we have unknown latency in the time taken to poll the dma transfer and calculate how full the buffers are.This means we have to set the threshold for taking action to slow down the transfer into the gpif block much lower than the total buffer space (each thread has 4 x 16384 byte buffers). 

The technical reference manual refers to DSCR_IS_LOW in the SCK_INT register as an interrupt when the socket descriptor counter is below the socket descriptor watermark.  This looks like the best function for our application but we can not find any reference documentation on the descriptor counter or its associated watermark and interrupts. Is any one able to help on this or some other means of generating interrupts on DMA watermarks.  Our possible fall back position is to link the watermark flags to GPIO inputs and interrupt on change of port but this requires hardware changes and we are already running low on I/O.

Hi everyone,

I'm trying to design a board using the FX3 but I got some questions about the VBUS/VBATT supplies. I don't know how I should use it.

I want my board to run on batteries so it is not always connected to a computer through the USB3 port (it can be connected if I need to send data to my board over USB or retrieve data over USB). I think I should use VBATT but I'm not so sure.

Should I connect VBUS to the USB VBUS line and VBATT to the output of a LDO ? (I'd like to use a LDO to get the 5V voltage).

What could the power consumption be if I use almost all the IOs of the FX3 in my design ? How many mA does the LDO need to produce for the VBATT pin in order to make the FX3 working properly ?

Thanks for the feedback.

Hello,

Currently we are starting the development of FX3 firmware. 

In order to do code testing we would like to integrate an external C compiler to the IDE. The C compiler can be Visual Studio Compiler, Cygwin or Mingw.

We would like to know whether this is possible? 

I want to use the FX3 superspeed explorer board in a design. But I want to power the FX3 IO from the board that the exploder is plugged into. So the VBUS would come from the USB connector and the IO from the motherboard. But there could be a situation where the IO voltage is turned off but the VBUS would still be on from the connector. So is it OK to do this?

Thanks

Hi,

   I use AN65974 to communicate FPGA with USB3014 . 

GPIF parameter ：

 sync slavefifo 、32bit、flaga is current_thread_dma_ready ,i have a counter about write data number,so i do not use flagb.

SDK:

buffer size = 16384bytes  ,DMA Count = 8(p to u)

FPGA:

I read data from FIFO(fpga),then  write data to usb3014 fifo.

But I have some problems ：

1.when i use "USB Control Center " ,click "transfer data-in",i can receive right data without PIB ERROR.

2.But when i use "C++ streamer", click "start",i will see "CYU3P_PIB_ERR_THR0_WR_OVERRUN " in UART GUI.

i want to know why .

Hello,

I tested the FX3 SuperExplorer Kit with the firmware from the example USBBulkLoopManualInOut and the Bulkloop application and it works fine in USB 2.0, but not in USB 3.0 (it is very slow and there are failures during the process). Is there any reason why this doesn't work on USB 3.0 (Windows 7 pro 64-bit)?

Thanks

Hello all!
I have a problem with my project for fx3 cyusb3014.
By using some examples from directory "EZ-USB FX3 SDK" and from Cypress company site I did a project.
This project contains 4 endpoints: BULK-IN (0x81), BULK-IN (0x82), INTERRUPT-IN(0x83), BULK-OUT (0x02).
Now I want to use 4th endpoint BULK-OUT (0x02). 4th endpoint is a DMA-channel HOST -> UART (tx). I use oscilloscope to view data on line tx.
So, I have two questions:
1 Transmission over BULK-OUT (0x02) works correctly only once (in CyControl application). It seems, that some error is presented in project sources. But I can not find it, where is my error?
2 Maximal length of first packet is equal to 1024 bytes. How can I increase this length? Can I use some queue for transmission big packets in fx3-project or host-project? My OS is Windows'7 x64.
Thanks in advance for any answers!
Regards, Evgeniy
P.S.: Project is attached here.