USB superspeed peripherals Forum Discussions

Hi,

I have a CYUSB3KIT-003, and I can see the UART output following the user guide.

But, when I try the AN84868 img file, there is not any UART output.

Is any missing operation?

Thanks

Hi,

I am developing on fx3 super speed board. First the board boots from USB as cypress bootloader and I upload my own image to RAM. Then the board is enumerated as Cypress FX3.  A set configuration command is received from host computer, followed by a unknown vendor request 0xa0. Writing to UART Egress Data Register 0xE0000810  works fine before receiving unknown 0xa0 request, I can communicate with the micro attached to UART and finish protocol messages. After receiving the 0xa0 request and return with handle=False, I find a strange problem: I tried to write to UART Egress Data Register 0xE0000810, the whole micro totally stopped running.

 I checked the most UART registers just before writing to the Egress data Register.  UART Config Register= 0x80071103, UART Status Register=0x1f0000f0, UART Power Register=0x80000001, Uart interrupt Register=0xc8, Uart interrupt mask register = 0x202. All looks good. 

Can anybody kindly tell me what caused the problem?

I am having some issues trying to add a new windowed resolution with the FX3 SDK.  We are using the CX3 dev kit by e-con systems.

In the Cypress EZ USB Suite, I am able to import a project and get the camera running, but I am having some issues adding new resolution settings.  I'd like to use the maximum resolution, but at an unusual aspect ratio.  The camera is the OV5640, which has a max resolution of 2592x1944, but I'd like to use this at a 6:1 or 4:1 aspect ratio.  I'd like to do this so that we can get higher frame rates at the max resolution.

When opening the ".cycx" file, I can see the settings, but the file is not editable.  Is there a way to add a new resolution entry to this file?  It looks like it is locked or something.  Any help or hints would be great.

 I've attached screen shots of the issue.   The + and - buttons to add configurations are locked out for some reason.

I followed the guide in the "Using the FX3 SDK on Linux Platforms, Version 1.3.3" documentation.

Then I enter the firmware directory and run make cd ~/cypress/cyfx3sdk/firmware make ... === ... compile ===

No errors, so the installation seem to be ok.

Then I try to build an application like First_FX3_App. I do the following modification to the makefile:

-FX3FWROOT=../.. -FX3PFWROOT=../../u3p_firmware +FX3FWROOT=/home/petter/cpress/cyfx3sdk/firmware +FX3PFWROOT=/home/petter/cypress/cyfx3sdk/firmware/u3p_firmware

Then if I try to run make I get:

makefile:22: /home/petter/cpress/cyfx3sdk/firmware/common/fx3_build_config.mak: No such file or directory make: *** No rule to make target '/home/petter/cpress/cyfx3sdk/firmware/common/fx3_build_config.mak'.  Stop.

Is there a problem with my installation structure or is the First_FX3_App made for a different version of the SDK?

There are quite a few candidates so I'm a bit confused:

find ~/cypress/ -name fx3_build_config.mak /home/petter/cypress/cyfx3sdk/fw_build/boot_fw/fx3_build_config.mak /home/petter/cypress/cyfx3sdk/fw_build/fx3_fw/fx3_build_config.mak /home/petter/cypress/cyfx3sdk/firmware/boot_fw/build/fx3_build_config.mak /home/petter/cypress/cyfx3sdk/firmware/common/fx3_build_config.mak

My environment (PATH modified to show last part)

env|egrep cypress\|ARM ARMGCC_VERSION=4.8.1 PATH=...:/home/petter/cypress/arm-2013.11/bin ARMGCC_INSTALL_PATH=/home/petter/cypress/arm-2013.11 FX3_INSTALL_PATH=/home/petter/cypress/cyfx3sdk

Any ideas?

I'm wondering where I can find the file arm926ejs_FX3.cfg.  It looks like the most recent version of OpenOCD has the correct devices installed to work with the CY7C65215 on the Explorer Kit board.  But that I can't tell until I try.

Otherwise I'll also need the patch files to patch and recompile OpenOCD.

Any advice is welcome.

I also have the same questions for Linux.

I have no access to Windows.  Haven't touch the stuff in about 15 years. 😉

Finally, I want to get up and running on the kit using the debugger built in through the CY7C65215 on both Mac and Linux.  Any pointers to someone who has already done this with advice would be great.

Thanx for the help in advance.

I was implement DMA read between FPGA and FX3. (FX3 SDK v1.3)

However, when DMA Read is continuously read, errors sometimes occur in FX3.

Ask for advice on the situation below.

The DMA Read method is as follows.
When an interrupt is generated in FX3 through GPIO in FPGA, FX3 is connected to state machine through GPIF Designer
Perform DMA Read function.

DMA Read is performed manually. (CY_U3P_DMA_TYPE_MANUAL).
Commit through CyU3PDmaChannelCommitBuffer() in DMA Callback function.

Counts the number of interrupts generated by the GPIO for debugging.
Counts the number called in the DMA Callback function for debugging.

The DMA read fails irregularly between 10,000 and 100,000 times, resulting in an error in FX3.
In this situation, the number of GPIO interrupts continues to increase.
In this situation, the number of DMA callback calls does not increase.

In the DMA configuration, it was tested by changing to AUTO, but the result is the same.

The Burst of EndPoint is set to 1.

EndPoint is Bulk type.

The DMA settings are as follows.

CyU3PMemSet((uint8_t *)&dmaConfig, 0, sizeof(dmaConfig));
dmaConfig.size            = 16384;
dmaConfig.count          = 8;
dmaConfig.prodSckId    = CY_U3P_PIB_SOCKET_1;
dmaConfig.consSckId    = CY_U3P_UIB_SOCKET_CONS_1;
dmaConfig.dmaMode    = CY_U3P_DMA_MODE_BYTE;
dmaConfig.notification  = CY_U3P_DMA_CB_PROD_EVENT;
dmaConfig.cb = CyFxDMAReadCallback;
Status = CyU3PDmaChannelCreate(&glDMARead_Handle, CY_U3P_DMA_TYPE_MANUAL, &dmaConfig);

case 2)

The number of Burst was changed to 2.

The DMA read fails irregularly between 10 and 100 times, resulting in an error in FX3.

Hi 

I am developing a USB3.0 camera with CX3. I have designed two general purpose buttons and attached them to two GPIO pins on CX3 (GPIO 24 and 21). Currently, these two buttons are used for brightness + and -. 

On the firmware side, I have managed to create a GPIO interrupt call back function and in which use CyU3PDmaChannelSetupSendBuffer to send the status interrupt packet to PC. 

My question is on the PC side how I can capture the status interrupt? I use V4L2 on Ubuntu 16.04 to develope the PC software. I googled the question but I haven't found any answers. In the V4L2 specs I noticed there is VIDIOC_SUBSCRIBE_EVENT, but I am not sure if this can capture the interrupt from the device.

Thanks!

Hi:

  I want to kill a thread which is in not in the idle state,how can i to do this?

I use a DMA to transfer from FX3 to PC and libUSB driver. I have two problems now. 

1) I noticed the IN endpoint only receives 1 transfer at PC then refuse to CyU3PDmaChannelGetBuffer. I can verify the received transfer is correct. In a multi-DMA IN EP, I could get 7 transfers before CyU3PDmaChannelGetBuffer fails. I believe the two issues share the same root cause. 

2) I would rather like to have the FPGAInterrupt to be called directly from CyFxGpifCB(), but it seems not working. I had to create a thread to poll for FPGA_Intr_called status and emulate an interrupt. 

Source segments below. 

    

void FPGAInterrupt()
{
    CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;
    CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "FPGAInterrupt() called \r\n");

    

    apiRetStatus = CyU3PDmaChannelGetBuffer (&glChHandleUVCControlIN, &buf_p_1, CYU3P_NO_WAIT);
    if (apiRetStatus != CY_U3P_SUCCESS) {
        CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "FPGAInterrupt.CyU3PDmaChannelGetBuffer failed, Error code = %d\n", apiRetStatus);
    }

    

    if (apiRetStatus == CY_U3P_SUCCESS) {
        CyU3PMemSet (buf_p_1.buffer, 0, 16*CY_FX_EP_BULK_VIDEO_PKT_SIZE);
        for (int i=0; i<16*CY_FX_EP_BULK_VIDEO_PKT_SIZE; i++) {
            buf_p_1.buffer = FPGAInterrupt_header[i%24];
        }
        buf_p_1.buffer[0] = intr_cnt;
        CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "FPGAInterrupt() memset done \r\n");
        /* Commit the full buffer with default status. */
        apiRetStatus = CyU3PDmaChannelCommitBuffer (&glChHandleUVCControlIN, buf_p_1.size, 0);
        if (apiRetStatus != CY_U3P_SUCCESS) {
            CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "CyFxUVCDmaDownloadCallback.CyU3PDmaChannelCommitBuffer failed, Error code = %d\n", apiRetStatus);
        }
        CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "FPGAInterrupt() memset done \r\n");
    }
    CyU3PDebugPrint(CY_FX_DEBUG_PRIORITY, "FPGAInterrupt() exits \r\n");
    return;
}

    

 

    

CyFxGpifCB (
        uint8_t currentState            /* GPIF state which triggered the interrupt. */
        )
{
    /* The ongoing video frame has ended. If we have a partial buffer sitting on the socket, we need to forcibly
     * wrap it up. We also need to toggle the FW_TRG a couple of times to get the state machine ready for the
     * next frame.
     *
     * Note: DMA channel APIs cannot be used here as this is ISR context. We are making use of the raw socket
     * APIs.
     */
    switch (currentState)
    {
        case FPGA_DO_INTR:
            intr_cnt++;
            FPGA_Intr_called = CyTrue;
//            if (FPGA_Intr_called == CyTrue) {
//                FPGAInterrupt();
//                FPGA_Intr_called = CyFalse;
//            }
      }
}     

    

 

    

 

    

void
uvcFPGAIntrThread_Entry (uint32_t input)
{
    for (;;) {
        if (FPGA_Intr_called == CyTrue) {
            FPGAInterrupt();
            FPGA_Intr_called = CyFalse;
        }

    

//        CyU3PThreadSleep(10);
        /* Allow other ready threads to run. */
        CyU3PThreadRelinquish ();
    }
}

    

 

    

 

    

    dmaCfg.size  = 16*CY_FX_EP_BULK_VIDEO_PKT_SIZE;
    dmaCfg.count = 1;
    dmaCfg.prodSckId = CY_U3P_UIB_SOCKET_PROD_5;
    dmaCfg.consSckId = CY_U3P_CPU_SOCKET_CONS;
    dmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE;
    dmaCfg.notification = CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT;
    dmaCfg.cb = CyFxUVCControlDmaCallback;
    dmaCfg.prodHeader = 0;
    dmaCfg.prodFooter = 0;
    dmaCfg.consHeader = 0;
    dmaCfg.prodAvailCount = 0;
    <cut>
    
    /* Create a DMA MANUAL_OUT channel for the consumer socket. */
    dmaCfg.notification = CY_U3P_DMA_CB_CONS_EVENT;
    dmaCfg.prodSckId = CY_U3P_CPU_SOCKET_PROD;
    dmaCfg.consSckId = CY_U3P_UIB_SOCKET_CONS_4;
    apiRetStatus = CyU3PDmaChannelCreate (&glChHandleUVCControlIN,
            CY_U3P_DMA_TYPE_MANUAL_OUT, &dmaCfg);

    

    <cut>

    

    apiRetStatus = CyU3PDmaChannelSetXfer (&glChHandleUVCControlIN, 0);

    

 

   

Is there a Linux device driver and test application available which is similar to the StreamerExample Device and Streamer application on Windows?

Or any other working driver/application I can use as a starting point and guideline for Linux development?