I decided the example I'd like to follow through is the back to back master/slave as outlined in AN87216 .
The AN states on page 1 "Firmware source code and GPIF II state machines for both master and slave FX3 kits are attached to this application note." The AN also lists table 4 (below). I have the latest SDK (1.3.4) and GPIF II designer, but I don't see these filenames anywhere. Also, what does it mean "the files in the attachment to this Application Note"?
The Infineon page for USB Super-Speed Code Examples lists the AN87216 , as shown below. All the references are circular and the location of the code remains a mystery to me.
scroll down to AN87216 .....
Click on this and the application note opens as PDF. Where is the associated folder mentioned in same PDF? What am I missing?
Dear infineon team,
I am trying to port my old code build using 1.3.1 SDK to 1.3.4 SDK. I faced a problem during I2C communication. I was sending some data through I2C before the CyU3PConnectState() API in my previous code. But while using 1.3.4 SDK the data transmitted over I2C was not written properly in registers. This is happening randomly (out of 5 times 2 or 3 times this issue occurs) . But in 1.3.4 SDK when I transmit I2C data after the CyU3PConnectState() API it is working properly.
kindly provide a solution to sort out this issue.
I am using a custom board where Fx3 USB controller is connected to Xilinx FPGA.
I am trying to create an board level Vhdl/Verilog test bench where Fpga is instantiated as DUT component and
FX3 as a test peripheral component.
Is there any VHDL/Verilog simulation model available for Fx3 USB Controller?
Thanks in advance,
Panneer Raja Vajravelu.
Please tell me where to download CyUSB3 suite source code.
It seems that the file was once available at the page below, but I can't find the download link for the file.
* I have the zip file I downloaded long long ago but I'm not sure it's updated or not.
Hi, I'm engineer developing camera modules using FX3 controller.
I'm configuring FX3 GPIF-II interface for some image sensor now.
The sensor support resolution as 2560x721x30FPS.
And data bus line is 10 lines and PCLK from sensor is 120Mhz.
But the FX3 is not support PCLK over 100 Mhz, isn,t it?
So I'm figuring out solving this problem.
If the PCLK is over 100Mhz, what problem is occured?
How can I solve this problem?
Please give me the solution.Show Less
Hi FX3 team,
From the example code in slavefifo_example\slfifosync, the UART in CyFxSlFifoApplnDebugInit (void) in the example code is pointing to CY_U3P_LPP_SOCKET_UART_CONS. meaning the UART message will be send to the physical UART port in cypress FX3 IC.
Can i reuse back the same code with minor change on :
and direct the UART message via USB to the host-PC and read it with teraterm terminal?
the example code i am refering to with the minor change is as in the picture attached.
Most of the data I'm trying to transmit seems to be going between the FX3 and the other chip just fine, but I'm periodically getting zero length packets seemingly coming from nowhere. I've been trying to debug this, but everything I've tried has been a dead end so far.
I'm trying to use the FX3 to connect an 8051 on our board with a host application on a windows PC. My setup is as follows:
Now the problem I'm seeing is that, the 8051 sends a keepalive signal periodically to the host app, and every once in a while, we get a zero length packet as well.
Here's what I've tried in my investigation:
I suspected that maybe there's noise or something changing the PKTEND pin long enough to trick the state machine into sending a ZLP, but my coworker has already dismissed that notion. He's the hardware guy, so I can't really make him check it, and he didn't leave a way to attach a scope or anything to the pin, so wouldn't be easy.
If anyone has any suggestions of what might be going wrong, or ideas for other things I could test, I'd love to hear them.Show Less
For my initial evaluation of USB3 Vision, I am using the source code shared in the forum. Using that source code, I am able to enumerate the device as a USB3 Vision device, but I cannot connect to any GenICAM application to test the streaming. Any guidance on this would be appreciated.
Thanks in Advance,
Vigneshkumar R.Show Less
We would like to make use of the Cypress CyUSB3 Driver Resell opportunity for Windows 10. Which information do you need to be able to proceed?Show Less
We want to certificate driver by resell process.
Could you please confirm below information?
publisher display name : 주식회사 휴톤
MPN ID : 6558010
os : win 10 x64, win 10 x86
driver version : 18.104.22.168
chip : fx3
Thank youShow Less