hello, I am new to usb_fx3,now I have an adc control by spi, so I wonder if usb_fx3 can finish the job?In other words,if I can use spi of fx3 to control the adc? If it can ,how to do ? which firmware I should read?

thanks!   

Hello,

In the slavefifo mode, as I know it supports 32bit mode, but How can I get "word data type" from XferData function not unsigned char?
When I found xferdata function in the Cypress CYAPI Programmer's reference document, I just came across the below example snippet code. but it just used as "unsigned char data type" not word data type.

In the 32bit slavefifo mode, How can I get data?

So I want to know how can I get the data as a word data type?

-------------------------------------------------------------------------------------------------
Example (from CYUSB3KIT documents)

CCyUSBDevice *USBDevice = new CCyUSBDevice(NULL);
unsigned char buf[] = "hello  world";
LONG length = 11;
 
if (USBDevice->BulkOutEndPt)
USBDevice->BulkOutEndPt->XferData(buf, length);
 
-------------------------------------------------------------------------------------------------

What if I have to get 32bit data as sequentially, is 32bit mode more faster about data transfer rate than 8bit mode?

hello,everyone,

I have write a GPIF state macnine.When I copy the gpifconfigure.h to the examples cyfx3ad9269 ,which is sent by dbir in the forum,but when I build it ,it shows "conflicting types for 'cyu3pdmabufferfree'",when I change the type to the unit8,and add the return 0,but there are more errors,what is the problem?I put the error.png and my project in the attaches,I hope you can help me try,thank you !

I'm using Cypress EZ-USB FX3 SDK v 1.3.3.

To increase transfer speed I choose an asynchronous model and BULK transfers. 
So sometimes (after 3, 10 or 30 minutes, times vary) I received a Stall condition. 
Received data lenght ("rLen" in code sample) in this case is 0. In all other cases it's more than zero. 
After receiving Stall I try to Abort and Reset Pipe (without success).

Also I try to close transfer using FinishDataXfer. 
And while do this I receive such exception "Invalid address specified to RtlValidateHeap( 0000000000A10000, 000000002C4B4A50 ) " at one of the queue element. 
Can you help me with this situation? 
 

Hi all,

I've got a design based on AN65974, a Streamer Example with the FX3 in slave mode.  On the GPIF side I have an 8-bit synchronous interface with address/data bus multiplexed and FlagA & FlagB used to signal DMA Ready from Thread 0 & Thread 1; Thread 0 handles all IN (input to FX3 from GPIF interface) traffic, Thread 1 handles all OUT (output from FX3 to GPIF interface) traffic.  The signals for Flag C and Flag D are not available.  On the USB side I have four bulk transfer endpoints, two IN (0x01, 0x02) and two OUT (0x81, 0x82).  On the ARM I've set up the DMAs to use automatic transfer with the following mappings:

    
1. Producer: CY_U3P_UIB_SOCKET_PROD_1  Consumer: CY_U3P_PIB_SOCKET_1  Endpoint: 0x01
    
2. Producer: CY_U3P_PIB_SOCKET_0  Consumer: CY_U3P_UIB_SOCKET_CONS_1  Endpoint: 0x81
    
3. Producer: CY_U3P_UIB_SOCKET_PROD_2  Consumer: CY_U3P_PIB_SOCKET_5  Endpoint: 0x02
    
4. Producer: CY_U3P_PIB_SOCKET_4  Consumer: CY_U3P_UIB_SOCKET_CONS_2  Endpoint: 0x82
   

DMA channel 2 produces a constant stream of traffic, the other DMA channels are very low, sporadic traffic.   And you see I'm incrementing the GPIF channels by four since I only have flags available for Thread 0 & Thread 1.

Here's the head-scratcher: If I only create via CyU3PDmaChannelCreate() DMA channels 1 & 2 above, everything works fine - I see a constant stream of traffic on endpoint 0x81.  If I create all four DMA channels, the data that was on 0x81 now is on 0x82 and no data is on 0x81.   And just for fun, I changed the USB side to use 0x03/Producer 3/0x83/Consumer 3 rather than 0x02/0x82 and saw similar results - all data on 0x83 and no data on 0x81.

What would cause this?  Have I messed up something in the address cycle of the GPIF interface?  Is there some mapping rule that I've missed?  I feel like I've been hitting my head against the wall for a couple days now, and any hint or direction at all would be appreciated.

Thanks,

Michael

Hi,

I am doing an USB Audio device (Speaker) with Cypress/Denebola CX3 platform. The descriptors tell the sampling frequency to be 44.1kHZ and 48kHZ. So during the 'CyFxUacApplnStart', I initialize the I2S port with 44.1KHZ (using CyU3PI2sSetConfig).

When I connect it to PC, it detects as an USB playback device. I am using Audacity tool in Linux. My questions are below.

1) If I select the playback device in Audacity, with a different sampling frequency (say 16kHZ), the I2S has to be reinitialized to 16kHZ instead of 44.1kHZ?

2) If so, how does CX3 get to know what sampling frequency application in host has chosen?

3) If it is over endpoint 0, can u please brief how it is done?

4) Shall the DMA buffer size be modified for different sampling frequency the host choose? Currently I am using 96 bytes for an ISO end point.

Sorry, I cant share the source.

Hi,

I receieved FX3 Dev board. I see that it has CY7C65215 USB Serial Dual chip which is supposed to be used as a JTAG debugger. Over the USB3.0, I am able to flash firmware etc, so all is happy with my dev board. When I connect to USB serial, it shows up appropriately on COM port.

I am following instructions from the help manual to launch the debugger. The board is in bootloader mode. However when I start the JLINK GDB server, it is not able to detect the USB Emulator. Is this the right interpretation? Can I do OpenOCD style USB JTAG debugging or do I need a SEGGER to actually connect to JTAG pins on the FX3 board? I don't know if JTAG pins are available either... 

Can you please help me understand this better?

- Sushant

hello,everyone,

what does this mean? I copy the program from forum.thank you ! I put it in the attaches,because paste always error!