USB superspeed peripherals Forum Discussions
Hi, I have a sensor which can only support a fixed MIPI data rate of 891Mbps (which I assume means I enter 445.5MHz into the "CSI Clock" field).
It is a 4K sensor, and we are running it at a low enough framerate that the CX3 can theoretically support. We're trying to use 24-bit video-packing of the 12-bit RAW12 output.
However, there is no combination of settings that the configuration tool accepts.
The first problem is the acceptable "CSI Clock". At 20fps, the tool rejects the frequency as too low, though the minimum (777MHz) would break the CX3 per-lane data rate limit of 1Gbps?
The second problem is the output pixel clock is not accepted. It seems like the tool determines that the minimum pixel clock required is more than 100 MHz. However, at 3864x2180@20fps on 12bpp, and packing the pixels into 24-bit video format, we're looking at approximately 85MHz pixel clock rate, so why is there an error?
Thinking this might still work, I've generated the relevant files and ran it on the hardware. The following error appears upon wakeup:
GpifCB:WrapUp SCK0 Err = 0x47
Is there any documentation about the proper meaning of each field in the configuration tool and how they are derived?
Show LessI create a new project, but the uart is no output, i have set useUart = CyTrue, and useSpi = CyFalse, but still no uart log, is there something wrong about it?
io_cfg.isDQ32Bit = CyFalse;
io_cfg.useUart = CyTrue;
io_cfg.useI2C = CyTrue;
io_cfg.useI2S = CyFalse;
io_cfg.useSpi = CyFalse;
Show LessHi Community!
I wanted to use the 16 bit gpif interface for the uvc project.
But after my change I am not able to see a image on the pc side and
after some seconds the transfer ends. The FPS Number is zero.
The Resolution is 1000 x 750
Number of Bytes to transfer 2 * 1000 * 750
Resolution set in cyfxuvcdsrc.c is 1000 x 750 for YUV
In the UART prints I doesn't see any Errors. The UART output is
uvc.c:269:CyFxUVCApplnUSBSetupCB:Info: Set CY_FX_UVC_VIDEO_STREAM_REQUEST_EVENT successful
uvc.c:1484:UVCHandleVideoStreamingRqts:Info: UVCHandleVideoStreamingRqts:Set CY_FX_UVC_STREAM_EVENT successful
uvc.c:1072:UVCAppThread_Entry:Info: DMA Channel Set Transfer successful
uvc.c:1083:UVCAppThread_Entry:Info: Starting GPIF state machine successful
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 0 frames and 0 buffers
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 16 frames and 21 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 33 frames and 0 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 49 frames and 66 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 66 frames and 27 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 83 frames and 0 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 99 frames and 72 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 116 frames and 33 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 133 frames and 0 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 149 frames and 79 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 166 frames and 40 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
uvc.c:326:CyFxUVCApplnUSBSetupCB:Info: Clear feature request detected..
uvc.c:1123:UVCAppThread_Entry:Info: UVC: Completed 170 frames and 7 buffers
uvc.c:1134:UVCAppThread_Entry:Info: The Image of PFGA is 1500000 bytes large
I have done the following steps. The duration of lval and fval is the same as by 8 bit interface.
I switched my gpif interface from 8 bit to 16 bit, change the ADDR_COUNT_LIMITER and DATA_COUNTER_LIMITER
to the value of 0x00001FF7 in cyfxgpif2config.h and doubled the width resolution in
the cyfxuvcdsrc.c in configuration descriptor.
Which step is missing?
Thank for your help
Show LessI have been using FX3 for a camera project for quite a while.
Recently, I'm investigating some awkward behavior which might be related to corrupted STACK. ThreadX documentation mentions option to build ThreadX library with TX_ENABLE_STACK_CHECKING in order to enable register thread stack error notification callback UINT tx_thread_stack_error_notify(VOID (*error_handler)(TX_THREAD *)); while this function exist in the FX3 SDK, it returns TX_FEATURE_NOT_ENABLED (0xFF), that means system was not compiled with performance information enabled. Is there an option to turn this feature on?
Feature description from ThreadX documentation:
This service registers a notification callback function for handling thread stack errors. When ThreadX detects a thread stack error during execution, it will call this notification function to process the error. Processing of the error is completely defined by the application. Anything from suspending the violating thread to resetting the entire system may be done.
Thanks
Marko
PS. I wasn't able to open MyCase, so I hope this forum can help me find the answer.
Show LessHi,
I am working with a CX3+OV5640 device that is operating as a UVC peripheral. My code is based on the latest version of the UVC app note (don't remember the number, but I updated it within the last month). My host OS is Linux and I am using v4l2 to read frames from the CX3. In general things work just fine. However, there are some conditions (especially when running a 4.9.x kernel) when they will occasionally fail after 5-20 minutes, whereas on a 4.14.x kernel I have run for 3+ days continuously without problems. Bisecting the two kernels is a giant pain. So, my goal is to accept the occasional failure and transparently recover from it (flagging an error, but not requiring the v4l2 application to restart anything).
I have tried various things and from what I see on a logic analyzer, I can get the producer side of the firmware to start back up after the CX3 HW state machine re-synchronizes with the frame start signal coming from the OV5640. However, I stop seeing consumer-side DMA completion callbacks once a failure occurs, and I don't see data make their way back into the host, either. I have the code instrumented to raise an IO on entry to the producer side of the DMA callback and drop it on exit, raise another IO on entry to the consumer side of the DMA callback and drop it on exit, and a third IO set to generate a rising edge on error (either timer-expired callback or commit buffer failure) and then it gets cleared as the last thing to happen in my adapted restart function. There's also a fourth IO that's programmed to toggle on each frame.
I've attached a screenshot from the logic analyzer showing this behavior. In it you can see normal operation for a few frames, then a failure. After the first failure, the producer side starts back up, but no activity occurs on the consumer side. This triggers another error and it all repeats. This particular capture was also monitored on the USB host via usbmon and wireshark. The capture there seems to show that the host side is issuing IN URBs that just never get responses from the CX3. I've attached the pcap file for that starting a few packets before the end of the last successful frame and stopping after the failure (it was running for a couple of minutes post-failure, there is just nothing happening on the USB interface, so packets stop). From this it also looks like the last packet into the host is short (21500 vs. 24572 bytes). Insight into the reason behind this would also be wonderful.
I have (adapted for the CX3 and) implemented the proposed application restart function as found in Error in example UVC_AN75779. I have tried calling this restart function both from within the DMA callback in response to CyU3PDmaMultiChannelCommitBuffer returning an error (it's always -71 for me). In this version of my setup I have avoided flagging the error to the main application thread. I've also tried flagging the error to the application thread and had the application thread run the restart function in response to the error. In other words, I've tried handling the error in two places and neither seems to work better (or worse) than the other.
I don't mind if the select call on my v4l2 file descriptor times out, my capture loop will just select on it again and go on with things.
Is there something I am missing or something else I need to do?
Thanks in advance!
For reference, my restart function is replicated below:
CyU3PReturnStatus_t CyFxUvcApplnRestart()
{
CyU3PReturnStatus_t apiRetStatus;
// cancel the frame timer
CyU3PTimerStop(&UvcTimer);
/* Disable the GPIF state machine. */
CyU3PGpifDisable (CyFalse);
/* Abort and destroy the video streaming channel */
CyU3PDmaMultiChannelReset(&glChHandleUVCStream);
CyU3PThreadSleep(25);
/* Flush the endpoint memory */
CyU3PUsbFlushEp(EP_UVC_VIDEO);
CyU3PBusyWait(200);
CyU3PUsbFlushEp(EP_UVC_VIDEO);
apiRetStatus = CyU3PDmaMultiChannelReset (&glChHandleUVCStream);
if (apiRetStatus != CY_U3P_SUCCESS)
{
log_err("\n\rAplnStrt:ChannelReset Err = 0x%x\n", apiRetStatus);
return apiRetStatus;
}
apiRetStatus = CyU3PDmaMultiChannelSetXfer (&glChHandleUVCStream, 0, 0);
if (apiRetStatus != CY_U3P_SUCCESS)
{
/* Error handling */
log_err("DMA Channel Set Transfer Failed, Error Code = %d\n", apiRetStatus);
return apiRetStatus;
}
/* Start with frame ID 0. */
glUVCHeader[1] &= ~CY_FX_UVC_HEADER_FRAME_ID;
/* Start the state machine from the designated start state. */
apiRetStatus = CyU3PGpifSMStart (CX3_START, CX3_ALPHA_START);
if (apiRetStatus != CY_U3P_SUCCESS)
{
/* Error Handling */
log_err("Starting GPIF state machine failed, Error Code = %d\n", apiRetStatus);
return apiRetStatus;
}
// restart frame timer
CyU3PTimerModify(&UvcTimer, glFrameTimerPeriod, 0);
CyU3PTimerStart(&UvcTimer);
// clear error gpio
CyU3PGpioSimpleSetValue(ERROR_GPIO, CyFalse);
return 0;
}
Show LessHi,
I've downloaded the cx3uvcov5640_uvc_cdc project and connected the CX3 to a 3.0 port.(The project i'm using is attached with this ticket)
I've shorted the Tx and Rx pins of the UART to get a loopback on the console.
When i am streaming data and take the serial console, i get perfect loop back characters.
But when i'm not streaming data and only take the serial console, i get a delay of one character in the console.
ie, when I press 'a' and 'b', the console shows only 'a' and only when i press another character would i be able to see 'b'. Thus there is a delay by one character in the console shown.
I tried referring the UsbUart example code in the SDK, but that is implemented in a different way and I couldn't integrate that into my current project.
Could you please help me out here.
Thanks in advance.
Show LessI'm using FX3 in a product for product-to-PC communication. This communication work successfully where the product is recognized as an USB3 Superspeed device. However when using USB-IF's compliance testing tool USB30CV, the tool is unable to detect my FX3 product, see figure 1 below. Is there anyone else who have encountered this problem? I.e. the compliance testing tool is unable to detect the device.
Figure 1, displaying error message in USB compliance tool which is unable to find fx3 device.
Hi,
I recently moved my development environment from a Windows 7 PC to a Windows 10 one.
I'm using EZ-USB SDK to develop firmware for CX3 devices.
Everything worked fine on old setup, but on Windows 10 I cannot compile my code anymore, with the following output:
cs-make all
Building file: ../.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
Invoking: Cross ARM C Compiler
cs-make: Interrupt/Exception caught (code = 0xc00000fd, addr = 0x420a53)
DId anyone encounter the same problem? How can be fixed?
Thanks a lot,
Best regards,
Andrea
Show LessHi,
My FPGA receive HDMI video source, and the video format is 1080P@60fps,YUY2.
Is this the only way to use "32 bits slave fifo sync" to transfer the video data?
What is the 32 bits data format? (D[7:0] ? , D[15:8] ? , D[23:16] ?, D[31:24]?)
I don't know how to assign my video data
Thanks
Show Less