USB superspeed peripherals Forum Discussions

Hello,

i am using CDC ACM model,

i have SET_CONTROL_STATE: USB request in oder to  control DTE/CTS signal,

how can i implement this requset?

any code snippet is there for SET_CONTROL_STATE?

regards,

geetha.

Hello all,

I am trying to interacting FX3 Cypress with BlueNrg1 board on I2C communication. is it possible to do this???

Hello,

why should we use below macro?

#define _IFREQ  24000            // IFCLK constant for Synchronization Delay

#define _CFREQ  48000            // CLKOUT constant for Synchronization Delay

in my application project,

IFCLK is 27mhz,should i use #define _IFREQ  27000  ?

and

i am not using clock out pin ,can i ignore this?

regards,

geetha.

Upon building the CX3 RDK project from e-consystems.  It appears to build OK, but there's an error when the IDE attempts to convert the generated ELF file to an IMG file:

cs-make --no-print-directory post-build

'Converting ELF to image (.img) format'

'C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\\util\elf2img\elf2img.exe' -i CX3RDKOV5640.elf -o CX3RDKOV5640.img

Failed to open file CX3RDKOV5640.elf

cs-make[1]: [post-build] Error -1 (ignored)

' '

'Invoking: ARM Sourcery Windows GNU Print Size'

arm-none-eabi-size  --format=berkeley CX3RDK_OV5640.elf

   text       data        bss        dec        hex    filename

159512       8068       6364     173944      2a778    CX3RDK_OV5640.elf

'Finished building: CX3RDK_OV5640.siz'

Notice the misformed path above: 'C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\\util\elf2img\elf2img.exe'

with two "\\".  Why does this happen?  Is there an IDE setting to fix this?

Thanks,

Scott

After transferring the project from SDK 1.33 version to SDK 1.34 version, the Cyclone IV FPGA download stopped working in PS(Passive Serial ) mode

via the function CyU3PReturnStatus_t CyU3PSpiTransmitWords (uint8_t * data, uint32_t byteCount)

When you roll back to the SDK 1.33 library through build variables FX3SDKVERSION, the download resumed.

With a detailed comparison of the source code, Cyu3spi.c detected a common bug (1.33 1.34) for the static "timeout" variable.

It is initialized once before entering the loop, and it is used several times in the loop.

In version 1.33, there is a check for the flag CY_U3P_LPP_SPI_TX_SPACE, in version 1.34 is not available(not check).

Konstantin.

I am confused about the proper connections of the SSTX and SSRX pins on the CYUSB3610.  I assume the SSTX is the transmit pair from the IC, but in the CY4701 RDK schematics the SSTX pins of the CYUSB3610 are connected to the SSRX pins of the Type A USB 3.0 connector.  This seems backwards, as the SSRX pins of the Type A connector should be sending data to the RX port of the USB controller.  What am I missing?  Is the RDK schematic correct?

To stream video data from fpga to fx3 what changes should be made in image sensor interface an75779 using it as a reference.

I have a project that works very reliable on Win7 computers, but when I use it on Win10 machines the success of grabbing frames drops to 50%. What is strange is that sometimes the rate of successfully transferring frames will change from as bad as 10% to up to 75%. But on the Win7 machine its 100-99% successful. I have updated to the most recent drivers 1.2.3.20 and still see the same issue. I have began to look into the code, but instinct makes me think it could be the OS or maybe a hardware problem. Another note is that I have tried all 4 USB3.0 ports on that Win10 machine and produce the same bad results. Computer specs are i7-4790 @ 3.60GHz 64 bit.

Hi!

On board, FX3 GPIO[56:53] are connected with a SPI FLASH chip; GPIO[49:46] are connected with a FPGA and will be used as part of 32 bits data bus.

Seems I'm not able to use UART to print debug info.

1. In this case, how can I debug firmware?

2. Can I safely comment out all UART debug related code from demo firmware?

Thanks!