USB superspeed peripherals Forum Discussions
Hello ,
I am working on FX3S and we are Using Slavefiffosync example to communicate with host application .while transferring data from host PC to FX3S after some iteration it is going to above 997 error . after changing the dmaCfg.size, dmaCfg.count, iterations got incremented but at last the result was same 997 error.if we need to
transmit data from PC to FX3S " n" no. of times what i have to do . can any one help me to solve this problem .
Thanks regards
Veerendra.
Show LessHello.
1) Is FX3S in mass production?
2) What are the revisions?
3) There is full support for the USB3 protocol.
4) What is the fundamental difference between the FX3S RAID-on-Chip USB Dongle and FX3S DVK whales? Schemes will be provided after purchase, or where they can be downloaded?
Best regards
Show LessI did on Windows what it said on AN84868 successfully. Now I want to implement the same on my own source code on linux (NEGU93/CYUSB3KIT-003_with_SP605_xilinx)
I am able to program the FX3 device and also send and receive bulk loopback messages as one will do on AN65974. (But with my same cpp code using cyfxbulksrcsink.img) I open a txt file and send it to 0x01 endpoint. I then try to read the same amount of bytes and I get the same exact response back on endpoint 0x81.
I try now to program the FPGA device. I first program the FX3 device with ConfigFpgaSlaveFifoSync.img then I program the FPGA with slaveFIFO2b_fpga_top.bin and it all seams to work correctly. The FX3 device reads the DONE signal and prints via UART that the FPGA was programmed successfully. I even tried with another .bin file that just play with some leds of the FPGA board to check it works fine and it does. However, when I try to send the file in the exact same way I did before (endpoing 0x01 and 0x81) I am able to send the files but I receive no answer.
Moreover, I tried after programming with my code, to use cyusb_linux program and I am able to send but not to receive the file I sent:
I tried both firmwares (the one for FX3 and the FPGA) using "FPGA Configuration Utility" to program both devices and "Control Center" to test the loopbacks on a windows machine and it works perfectly.
I have not many ideas on how to debug. Any advice?
Thank you very much.
Show LessHi,
I would like to transfer 2/4bit data coming out from a board to USB. The only other signal that I have is the clock (which is not a multiple / sub-multiple of 100MHz GPIF clock).
I have verified the hardware setup - clock is coming out properly and the data bits are toggling appropriately. When I use the GPIF2USB example, I'm able to read the data using Streamer but there are issues of over sampling and data loss due to GPIF clock and external clock being out of sync (12.3MHz Vs 100MHz GPIF). Can somebody plz. help me with a firmware image with which I can get the data transferred. I know that the minimum data width of GPIF is 8 and I have a software for taking out only 2/4bits out of this.
Any help is deeply appreciated.
Thanks
Venkatesh
Show LessHey Guys,
I have a Cypress FX 3 USB host connected to a Spartan 6 FPGA. I am using the GPIF 32bit interface to connect to it running in Synchronous mode.
I am running the interface at the maximum frequency of 100Mhz.
I am not sure if i have got the timing constraints correct on the FPGA side.
I have drawn it out in the attached "GPIF Timing Diagram Mod". Basically this is what i think it should be, but i would like some confirmation from someone else that i am on the right track.
If there are additional constraints that you think i should add, please advise.
The timing constraints that I’ve specified in the UCF file is as follows:
##------------------------- GPIF timing Constraints -------------------------------##
# Offset constraints
# Timing group for pads
TIMEGRP "DQ" = PADS("DQ<0>") PADS("DQ<1>") PADS("DQ<2>") PADS("DQ<3>") PADS("DQ<4>") PADS("DQ<5>") PADS("DQ<6>") PADS("DQ<7>") PADS("DQ<8>") PADS("DQ<9>") PADS("DQ<10>") PADS("DQ<11>") PADS("DQ<12>") PADS("DQ<13>") PADS("DQ<14>") PADS("DQ<15>") PADS("DQ<16>") PADS("DQ<17>") PADS("DQ<18>") PADS("DQ<19>") PADS("DQ<20>") PADS("DQ<21>") PADS("DQ<22>") PADS("DQ<23>") PADS("DQ<24>") PADS("DQ<25>") PADS("DQ<26>") PADS("DQ<27>") PADS("DQ<28>") PADS("DQ<29>") PADS("DQ<30>") PADS("DQ<31>");
# Offset in (for Cypress FX3 -> FPGA)
TIMEGRP "DQ" OFFSET = IN 5ns VALID 7.5ns BEFORE "SYSCLK_P" RISING;
Show LessWe have an application when sends a Vendor command to our FX3, which is handled by the embedded software, followed by a BULK OUT data transfer over the GPIF interface with an IN response expected.
The BULK transfers are handled by AUTO DMA mode and are known to be working fine.
Over USB3 we have no issues and the LeCroy USB trace shows SETUP, OUT, IN as expected.
On USB2 the IN transfer is always delayed by a number of seconds. The trace shows SETUP, OUT, <delay of a number of seconds>, IN.
The USB2 and USB3 captures are shown in the attached files.
On USB2 IN, packets are constantly NACK'ed and eventually the IN data is transferred.
Any pointers, please.
Thanks.
Show LessHi,
According to this knowledge base article:Low Power Modes in FX3, FX3S, CX3, SD3, FX2G2, and SD2 – KBA225742
There are L2, L3 and L4 low power modes for FX3S when operating at usb 2.0 mode.
Reference the LowPowerTest project in the SDK:
Only the 0xE3 command works in my system. And I send the command, the USB device disappear in the control center.
What should I do to correctly put the FX3s in the L2 mode and wake up by the host sending any USB command?
Show LessHello?
Can I get JTAG cable for debugging FX3?
do you have a similar sample code like:
http://www.cypress.com/documentation/code-examples/ez-usb-cx3-uvc-1110-example-using-aptina-a0260-sensor
but this is Bulk-only UVC 1.1 compliant example, i need isoc UVC 1.1 compliant example. do you have such example code?
thanks
xingxing
Hi,
//Do some init
if (!Device->BulkOutEndPt->XferData(data, outlen))
{
Device->BulkOutEndPt->Abort();
return false;
}
if (!Device->BulkInEndPt->XferData(indata, inlen))
{
//fail on bulkin
Device->BulkInEndPt->Abort();
return false;
}
And I can read out data by Cypress Control Center right after fail. I checked code and can not find different.
Can you help to check it, thanks.
Show Less