USB superspeed peripherals Forum Discussions

Hi,

I am trying to expand the bulk loop example so that the firmware to contain additional configurations.

I duplicated the CyFxUSBHSConfigDscr array in cyfxbulklpdscr.c to and changed the configuration number and number of configurations on the device descriptor.

a "stall" is returned when the host tries to configure the device (set-configuration).

do you have any ideas or code examples for this issue?

thanks,

Gal

Hello

Re: CX3 configuration for OV5680 RAW10 format

I am understanding  that RAW10 input data can be converted to YUV422 with CX3 based on the above Link,and the conversion data can be viewed as standard UVC data with UVC applications such as AMcap and e-CAMView.

Q1)

If they change the data format mentioned above, is it ok to think that it can be changed only by customizing the CX3 FW? No need to change the UVC driver?

Q2)

Could you please explain in details how the data array of YUV422 is converted when RAW10 is packed with 16bits?

Best Regards,

Arai

I use GPIO for input interrupt, but I can't get in to interrupt, may I ask where I made a mistake? Here is my initialization and interrupt code:

// gpio int

void CyFxGpioIntrCb (uint8_t gpioId)

{

CyBool_t gpioValue = CyFalse;

CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;

/* Get the status of the pin */

apiRetStatus = CyU3PGpioGetValue (gpioId, &gpioValue);

if (gpioValue == CyTrue)

{

CyU3PGpioSetValue (22, CyFalse); // FOR IR LED

}

else

{

CyU3PGpioSetValue (22, CyTrue); // FOR IR LED

}

if( GPIO_SSOR_XVS == gpioId)

{

}

}

// init gpio

void

CyFxGpioInit (void)

{

CyU3PGpioClock_t gpioClock;

CyU3PGpioComplexConfig_t gpioConfig;

CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;

/* Init the GPIO module */

gpioClock.fastClkDiv = 2;

gpioClock.slowClkDiv = 0;

gpioClock.simpleDiv = CY_U3P_GPIO_SIMPLE_DIV_BY_2;

gpioClock.clkSrc = CY_U3P_SYS_CLK;

gpioClock.halfDiv = 0;

vJackyTestPrintNormal (4, "CyU3PGpioInit begin\n");

apiRetStatus = CyU3PGpioInit(&gpioClock, CyFxGpioIntrCb);

if (apiRetStatus != 0)

{

/* Error Handling */

vJackyTestPrintErr (4, "CyU3PGpioInit failed, error code = %d\n", apiRetStatus);

// CyFxAppErrorHandler(apiRetStatus);

}

CyU3PGpioSimpleConfig_t gpioConf = {0};

gpioConf.inputEn     = CyTrue;

gpioConf.driveLowEn  = CyFalse;

gpioConf.driveHighEn = CyFalse;

gpioConf.outValue    = CyFalse;

gpioConf.intrMode    = CY_U3P_GPIO_INTR_BOTH_EDGE;

apiRetStatus = CyU3PGpioSetSimpleConfig (44, &gpioConf);

}

main function：

io_cfg.gpioSimpleEn[1]  = io_cfg.gpioSimpleEn[1]  | FX3_GPIO_TO_HIFLAG(44);

Hello

https://community.cypress.com/message/35996#35996

Regarding the above community Link, there is a answer below.

>CyU3PUsbSetTxSwing API sets the Tx amplitude used by FX3 on the USB 3.0 interface.

>Please use this API with caution. The device has only been tested to work properly under the default swing setting of 0.9V (swing value set to 90).

>This API is expected to be called before calling the CyU3PConnectState() API to enable USB connections. (swing TX Amplitude swing in 10 mV units. Should be >less than 1.28V)

>

Qestion)  Where is this 0.9V measured result? I think it is an IC output pin, but is it correct? Or is it the end of the USB cable (= HOST side)?

Best Regards

Arai

Hi,

I had a spartan 7 fpga dumping data into the FX3 and was reading the data with a modified version of STREAMER C#.

The protocol was BULKtransfer. I was seeing some dataloss on some computers so I needed to move Isochronous protocol.

In bulk i was using 64*1024byte DMA buffers.

In bulktransfer the data that gets put into xBufs is always exactly the amount of data I suspect =>

The amount of Packets per Xfer*1024.

For my current application that was 19 packets of 1024. Worked like a charm

Just go USB_data_frame = xBufs

Now that I've changed the FX3 code to ISOCHRONOUS this is not longer true.

I had to increase the DMA buffer size as isochronous is really slow with small buffers.

Currently I still need to send dataframes of 19kB but I have to send at least 8 packets per Xfer (isochronous demands this) but i also had to increase the buffersize to 4KB instead of 1024.

Therefore, I'm sending at least 32KB every Xfer.

This is not a problem. I can deal with this on another level.

I do notice however that the packets that are coming in through

isoc.FinishDataXfer(ref cBufs, ref xBufs, ref len, ref oLaps, ref pktsInfo))

aren NOT 32 KB anymore.

They're alternating between 8KB and 12KB which makes me think it's sending either 2 or 3 bursts of the 4KB dma buffers.

To makes things worse, it seems that the data is skipping randomly.

Does that have anything to do with the "overlaps"?

USB_data_frame = xBufs  does not work for sure

I only have been programming C# since last week so I'm quite in over my head.

Can anybody point me in the right direction as far as the inner workings of isoc.FinishDataXfer goes.

The manual is sooo incredibly short and explains nothing.

Thank You!!!!!!!!!!!!!!!!!!!!!

Hello,

Today has arrived my CYUSB3KIT-003 EZ-USB FX3 SuperSpeed Explorer Kit and I need to interface to an FPGA.

The basic idea of the connection is the following:

FPGA => CYUSB3KIT-003 through GPIF II => USB (2.0 or 3.0) storage device.

Then I read into the UG (https://www.cypress.com/file/133836/download 😞

"The SuperSpeed Explorer Kit development board is powered from the USB 3.0 connector J1. This development board does not support self-powered mode, although the FX3 device does support it."

So what is the correct way to supply power to the board in case of using a USB storage device connected to J1 ? Isn't it possible to work this way ?

Thanks.

Regards,

simozz

5V was placed on one of the data pins (D+ or D-) and no other power was supplied to the device.  Would damage have occurred?

We have a board that uses the FX3 part (CYUSB3014-BZX) and is powered by the USB bus.  The wiring harness had a mistake and 5V was placed on one of the data pins (D+ or D-).  Since the board is powered by the USB bus, no other power rails were present to the FX3 part.  I don't see any info in the datasheet about absolute levels on the USB pins.

I need the questioned answered urgently.

Thank you,

Jeff

Gents,

I have a firmware actually running on cypress RDK with a custom sensor.

On this sensor, I can select the number of CSI lanes I want to use to transmit video data.

I have observed a curious behavior when changing the number lines.

When I select 4 lanes the sensor is streaming properly and I do not observe any MIPI errors when checking CX3 error counters. If I switch to 1 lane the device is still streaming properly (I have adjusted FIFO delay to take into account the new configuration) but I observe that ctlErrCnt=3 for each frame captured all other counters are staying to 0.

What is the exact meaning of this "ctlErrCnt" field ?

The header file says "Control error (incorrect line state sequence) count", is it possible that the fact that the 3 lanes not used are not grounded could generate this error ?

Hi,

I am using USB 3.0 MUX, PI5USB30213AXEAEX with CX3. In the reference design of PI5USB30213AXEAEX, 0.22uF AC coupling capacitor is recommended for TX signals and 0.33uF AC coupling capacitor is recommended for RX signals from the connector and 0.22uF AC coupling capacitor is recommended for the TX signal near the CX3.

Can someone please confirm if this recommendation can be supported by CX3/FX3. Please refer below image for understanding the design

Thanks,

Menaka

Dear all,

This thread refers to debugging the DENEBOLA CX3 evaluation board using SEgger J-Link when using Linux (Ubuntu) Platform.

I follow both EzUsbSuite_UG.pdf and  FX3_SDK_Linux_Support.pdf document sfor that matter.

From eclipse I tried to debug the sample application that demonstrates data transfer from the FX3 GPIF port to the USB port with no success.

It looks like the debugger is stuck - cannot step over \ step into.

please see console log below:

./JLinkGDBServer -device ARM9

SEGGER J-Link GDB Server V6.54c Command Line Version

JLinkARM.dll V6.54c (DLL compiled Nov  7 2019 17:05:41)

Command line: -device ARM9

-----GDB Server start settings-----

GDBInit file:                  none

GDB Server Listening port:     2331

SWO raw output listening port: 2332

Terminal I/O port:             2333

Accept remote connection:      yes

Generate logfile:              off

Verify download:               off

Init regs on start:            off

Silent mode:                   off

Single run mode:               off

Target connection timeout:     0 ms

------J-Link related settings------

J-Link Host interface:         USB

J-Link script:                 none

J-Link settings file:          none

------Target related settings------

Target device:                 ARM9

Target interface:              JTAG

Target interface speed:        4000kHz

Target endian:                 little

Connecting to J-Link...

J-Link is connected.

Firmware: J-Link V10 compiled Oct 22 2019 16:28:15

Hardware: V10.10

S/N: 50119080

Feature(s): GDB

Checking target voltage...

Target voltage: 3.32 V

Listening on TCP/IP port 2331

Connecting to target...

J-Link found 1 JTAG device, Total IRLen = 4

JTAG ID: 0x07926069 (ARM9)

Connected to target

Waiting for GDB connection...Connected to 127.0.0.1

Reading all registers

Read 4 bytes @ address 0xF0000048 (Data = 0xEAFFFFFE)

Received monitor command: speed 1000

Target interface speed set to 1000 kHz

Received monitor command: clrbp

Received monitor command: reset

WARNING: PC of target system has unexpected value of 0xF00002A8 after reset.

Resetting target

Received monitor command: halt

Halting target CPU...

...Target halted (PC = 0x00000000)

Received monitor command: regs

PC = 00000000, CPSR = 000000D3 (SVC mode, ARM FIQ dis. IRQ dis.)

R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000

R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000

USR: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000

     R13=00000000, R14=00000000

FIQ: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000

     R13=00000000, R14=00000000, SPSR=00000010

SVC: R13=00000000, R14=00000000, SPSR=00000010

ABT: R13=00000000, R14=00000000, SPSR=00000010

IRQ: R13=00000000, R14=00000000, SPSR=00000010

UND: R13=00000000, R14=00000000, SPSR=00000010

Reading all registers

Received monitor command: speed auto

Select auto target interface speed (7827 kHz)

Received monitor command: flash breakpoints 1

Flash breakpoints enabled

Received monitor command: semihosting enable

Semi-hosting enabled (SVC Addr = 0x08)

Received monitor command: semihosting IOClient 1

Semihosting I/O set to TELNET Client

Downloading 9512 bytes @ address 0x00000100

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Downloading 1048 bytes @ address 0x40030000

Writing register (PC = 0x4000bcf8)

Read 4 bytes @ address 0x4000BCF8 (Data = 0xE59F1034)

Read 2 bytes @ address 0x40003F1A (Data = 0x2300)

Read 2 bytes @ address 0x40003F4E (Data = 0x6BFB)

Read 2 bytes @ address 0x40003F1A (Data = 0x2300)

Read 2 bytes @ address 0x40003F1A (Data = 0x2300)

Read 2 bytes @ address 0x40003F1A (Data = 0x2300)

Received monitor command: clrbp

Received monitor command: reset

WARNING: PC of target system has unexpected value of 0xF001C144 after reset.

Resetting target

Received monitor command: halt

Halting target CPU...

...Target halted (PC = 0x00000000)

Received monitor command: regs

PC = 00000000, CPSR = 000000D3 (SVC mode, ARM FIQ dis. IRQ dis.)

R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000

R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000

USR: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000

     R13=00000000, R14=00000000

FIQ: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000

     R13=00000000, R14=00000000, SPSR=00000010

SVC: R13=00000000, R14=00000000, SPSR=00000010

ABT: R13=00000000, R14=00000000, SPSR=00000010

IRQ: R13=00000000, R14=00000000, SPSR=00000010

UND: R13=00000000, R14=00000000, SPSR=00000010

Reading all registers

Reading all registers

Read 4 bytes @ address 0x00000000 (Data = 0x17B514D7)

Setting breakpoint @ address 0x40003F1A, Size = 2, BPHandle = 0x0002

Setting breakpoint @ address 0x40003F4E, Size = 2, BPHandle = 0x0003

Starting target CPU...

Please advise,