USB superspeed peripherals Forum Discussions

Hi, I'm trying to modify cyfxbulklpautoenum project in EZ USB v1.3.4 library, and found a question: CANNOT use cyu3mipicsi.h library.

[example]

Step1. Include cyu3mipicsi.h into cyfxbulklpautoenum project

Step2. Add CyU3PMipicsiSleep() and then build project. It will show error as below image.

However, if I select CyU3PMipicsiSleep() and Open Declaration, it can indicate the correct path by SDK 1.3.4!

Do I miss something for using cyu3mipicsi.h?

Best regards,

Hughes

Dear all,

Before I used EZ-USB FX2 to transfer data, FlagA was always 0.

When I press "Bulk OUT"  FlagA will change from "L" to "H" and the FPGA will receive the data.

I want to use FX3 sends data to FPGA,but FPGA never receives data.

I use logic analyzer to check the signal.Found that FlagA is always "H".

when I didn't send any data(Idle) or I press "Bulk OUT" that FlagA is always "H".

So I want to know how to make FlagA become "L".

Thanks!

Hi there,

I have seen in the CX3 reference schema from eCon Systems (Denebola) that the VCC_CLK is getting after LC filter.

I would like to know if this LC filter is there to remove the generated noise from output LDO voltage. Or to remove the possible hight initial inrush current from pin B6(CVDDQ).

In the first case, VCC_CLK is in correct position, after LC filter. But in the second case, It is not better to place the exit of VCC_CLK just before LC filter, in order to mitigate the impact of the possible initial hight exit current in B6 pin?

Thanks.

Hi , I installed EZ-USB FX3 v1.3.4 and want to use bulkloop example to understand the transmission mechanism by BULK endpoint between FX3 & PC.

FW: .\Cypress\EZ-USB FX3 SDK\1.3\firmware\basic_examples\cyfxbulklpautoenum

SW: .\Cypress\EZ-USB FX3 SDK\1.3\application\cpp\bulkloop

It's work to run the example, and I figure out the transfer mechanism by studying the code:

Step1. PC send the constant size data to the FX3 by bulk-out ep

Step2. FX3 transfer the data (received from Bulk OUT ep) to bulk-in ep, and send back to PC

Step3. PC compares the IN & OUT ep buffer to judge the transmission result

I know it uses DMA auto mode for data buffer, which means the CPU is not involved in the data transfer.

Therefore, I don't find any code in the FW project "cyfxbulklpautoenum" to process the bulk ep data.

In this case, how to achieve the Step2 by FW?

Thank you

Hello,

Using the original slave fifo code provided (with only some vendor commands added)

I Write some data on the slave fifo terminate last word with "pktend" (signals look perfect and exactly as in the slave fifo write sequence diagram)

Then I see the on the serial port debug the "buffers sent" passing from 0 to 1. So I must be writing it well.

However when I try to bulk receive I got 0 bytes.

Looking closer when message passes from "buffers sent: 0" to "buffers sent: 1" there is one error:

"CyU3PDmaChannelCommitBuffer failed, Error code = 64"

Since I did not touch anything on the slave fifo example provided what am I doing wrong ?

I added a few vendor commands that write some bits on gpio pins and changed the define from 32bit to 16bit wide, all the rest is untouched.

(running lower clock, 50MHz or 25MHz, does not help).

What am I missing ?

Any help please.

Luis c.

Hello.

I'm using FX3 and I firmware that setup Bulk EP.

I write c# software from

CyUSB.NET dll that get data from this Bulk EP via async method (beginXfer)

I test this software on differents machine and it's OK

but

when I use Intel(R) Penitum(R) CPU N3710 @ 1.6GHz with 4.00GB RAM

and Windows 10 Enterprise LTSC

I cant' reach 13MBps stable.

Data are 1024Byte packets generated at 13MBps from FPGA connected to FX3 via GPIF II

and

FX3 DMA is setup as 200 buffers capable of 1024Byte.

What I notice is that internal FX3 buffer sometimes overflows.

The problem is serious when I overload Pentium CPU.

Can someone help me ?

I watch CyUSB.NET sources from github

and I see that BeginXfer uses

IOCTL_ADAPT_SEND_NON_EP0_DIRECT

control code for DIRECT transfer (non buffered).

But the driver uses DMA when receive this IO control code ?

Greetings.

I would like to use UART on an FX3 in DMA mode, but I have variable sized packets.

The DMA architecture refers to producers sockets being able to signal End of Packet (EOP) to cause partially filled DMA buffers to be committed.

Is there a method to specify a bit pattern e.g. ASCII ETX (0x03) in the received data so that the UART or DMA adapter can signal EOP.

I have variable length packets using an ASCII protocol in the format as follows: -

<STX><variable length data converted to ASCII HEX><16 bit CRC converted to ASCII HEX><ETX>

I have used register mode transfers which works but appears to consume lots of CPU time.

I am hoping that changing to DMA mode will be more efficient but I cannot see how to cope with variable sized packets.

Can CX3 receive 4 virtual channel from nextchip NVP6324 that connects four cameras?

I am using i.MX8QXP that only has one MIPI CSI2, one MIPI CSI2 can only connect four cameras. So I am going to use USB3.0+ CX3+NVP6324 to connect another four camers.

Thank you！

Hello, guys.

In our system we have FX3 controller used to control various IMX image sensors through FPGA. In FX3 we have implemented the firmware from AN75779 (as a starting point) which makes our system recognized as UVC-class device from the Host PC.

There is a need to dynamically change the resolution of the video streams during runtime of the system. In this thread, you explained how we can change the resolution of the stream when the request is initiated by the Host PC.

1) Now, there is one more use case when the request for the resolution change will come from the FX3 device. This is the request to change the resolution from the default one to the desired one.

Namely, our system is designed to support different image sensors from IMX family. Consequently, we would like to be able to start streaming different resolutions depending on the IMX sensor connected (e.g. IMX250, IMX253, IMX420...). We are able to get the IMX sensor ID within CyFxUVCApplnInit() function. However, I am not sure how to inform the Host which resolution will be played. Host expects DEFAULT resolution to be played which is always THE LAST Class specific Uncompressed VS frame descriptor described in CyFxUSBSSConfigDscr[] descriptor!

I tried with sending

CyU3PUsbSendEP0Data (CY_FX_UVC_MAX_PROBE_SETTING, (uint8_t *)glProbeCtrl_1934x1094_30fps);

to the Host as soon as I get IMX sensor ID but to no avail! It seems something more is needed.

What I am missing here? How FX3 can tell the Host during start-up process which resolution will be played?

2) We need to have a closer communication between the Host and FX3. In addition to requesting basic parameters like change resolution, get gain etc. we would like to be able to send some more requests from the Host to FX3 like:

- Start playing patterns

- Read the value of image sensor register and send it to me (e.g. register value that stores temperature).

To the best of my understanding, extension unit can be used to implement custom (vendor-specific) features (I am aware we need to customize Host application for that).

On page 11 (Section 2.3.2.1) of AN75779 document, you give some explanations on how to design UVC extension unit in FX3 firmware (this thread). I would like to try my luck and implement that. At the same place you mention uvc_extension_app_x64.exe file as well as

"Guidelines to run the Host application is provided in the readme.txt file in the attached project"

Where I can find that uvc_extension_app_x64.exe file and attached project you are talking about?

Thanks for your time and efforts.

Sincerely,

Bojan.

does cx3 have any requirements for h-blanking?  what is the minimum h-blanking that i can set?