Hello Infineon! This is getting long sorry:

To summarize the issue, there is no SIB boot method in boot_fw.
The reason I need to do this is to encrypt the main firmware loaded onto the drive. In the future we might look into getting FIPS 140-3 lvl 2 or 3 with FX3s.
Q 1. Is there a method to use normal firmware to perform a jump to another firmware operation like what is provided in boot_fw?
Q 2. Does the posisitions set in the ld files need to be retained after a different firmware starts?
Q 3. Can I get a package with the tools needed to compile boot_fw to add SIB support into it? I won't do this if Question 2 works.

I'm still not clear about the purpose of the 32kb's at the end of Sys_mem, it was brought up in this forum post I made earlier, I don't think I was been clear: https://community.infineon.com/t5/USB-superspeed-peripherals/Clarity-on-second-stage-boot-area-purpose/m-p/441219#M34194

To rephrase the question: Given this scenario:
2 firmwares: Boot loader and main firmware

1. Boot loader firmware with concatenated/stored firmware runs/starts from the last 32KB's in Sys_mem
2. Loads main firmware into start address (0x40000000 I think maybe 0x40003000, from SPI or iC2 storage)
3. Jump FX3 to start of main firmware address and starts main firmware
At this point, as the main firmware is now running, why does main firmware need to retain that 32kb's in Sysmem? Can it jump back to this firmware or is there a checksum/tamper protection reason? It seems like it can now be overwritten and used safely.

My current problem is that we have ONLY SIB drive for firmware on an eMMC chip, and boot_fw does not have a method for handling this. The 2 ideas I'm about to try to play around with is:

1. Rewriting boot_fw's cyfx3.ld's memory position from: 0x40078000 to the position used for the start of "Data Area" of the main firmware set in fx3.ld (PLEASE CORRECT ME if this is not how firmware is loaded up into FX3's RAM, I am basing this from the reply in previous post linked above) This is approximately the half way point of the 512kb's RAM on fx3s.
-This way I can make the main firmware as a large array within boot loader firmware (Memory location Data in boot's fx3.ld file modified accordingly), I should also be able to use a compression method on it too reducing the actual firmware file size stored.
-For any future firmware updates, I will just switch between boot options 0 and 1 (NOTE SIB drive is split into 4 partition: 0 and 1 boot, 2 data, 3 data) so modifying/dynamicly loading from SIB should not be an issue.

2. Recompile boot_fw with SIB source from normal firmware. I haven't had luck with this yet, to go down this route, I would greatly appreciate a package of tools or links to the correct versions of them such as Cygwin etc. used instead of just the pdf: https://community.infineon.com/gfawx74859/attachments/gfawx74859/usb-superspeed-peripherals/5750/1/FX3FirmwareSourceUserGuide.pdf)
-Please note I had a similar hard time compiling the boot firmware loader for fx3s with visual studio, that required some obscure version of the DDK for windows 8.1 or something like that.... Newer/older versions didn't work
-This way I can use the boot_fw with SIB (card manager) and the recommended approach can be followed. I am more then happy to share the resulting source code for boot_fw with SIB too.

Regards!

Fujimi

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We are using CYUSB3.sys for an application with many usb devices attached.   Is there a limitation to the number of devices which this driver can control?  We had a legacy driver (ezusb.sys) that had an internal limit of 32.  I've looked at the documentation and headers and couldn't identify such a limit.  

Thanks for any help / insight

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Hello, I am developing the firmware for Cyusb3014. I would like to save my data in the firmware to the EEPROM that comes with Cyusb, and then insert it into the host computer to read the data from the EEPROM through the upper computer. What should I do? Thank you Show Less

Dear Team,
I need to use a GPIO for a reset control for my image sensor and other deices. for that I'm trying to add simple on GPIO control to my CSI generated code but when I add these following lines my device is no longer enumerating as a UVC device or any other device.

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Hi,

I would like to use FX3 controller to directly connect the parallel LVDS output from a 14-bit dual channel ADC with 250MSPS. From the datasheet of the device, it is clear that I can connect ADC output to the pins of GPIFII interface, and it can connect that to USB port. My questions are:

1) Can I connect dual channel ADC to FX3 controller? I am planning to use analog devices AD9643BCPZ-250 ADC for my application. Is this compatible to FX3? Please find datasheet of ADC below.

2) My application with ADC is to convert the IQ baseband to digital. Can I use FX3 for such kind of applications? Or FX3 is dedicated only for video signals?

3) I would like to store the data on fast memory on the device itself. Is it possible with FX3 controllers?

Thank you in advance.

Regards

 

https://www.analog.com/media/en/technical-documentation/data-sheets/AD9643.pdf

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Hi,

I would like to use FX3 controller to directly connect the parallel LVDS output from a 14-bit dual channel ADC with 250MSPS. From the datasheet of the device, it is clear that I can connect ADC output to the pins of GPIFII interface, and it can connect that to USB port. My questions are:

1) Can I connect dual channel ADC to FX3 controller? I am planning to use analog devices AD9643BCPZ-250 ADC for my application. Is this compatible to FX3? Please find datasheet of ADC below.

2) My application with ADC is to convert the IQ baseband to digital. Can I use FX3 for such kind of applications? Or FX3 is dedicated only for video signals?

3) I would like to store the data on fast memory on the device itself. Is it possible with FX3 controllers?

Thank you in advance.

Regards

 

https://www.analog.com/media/en/technical-documentation/data-sheets/AD9643.pdf

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Hi,

Using the same firmware built in SDK versions 1.3.1 and 1.3.4 shows difference in CyU3PDmaMultiChannelGetBuffer failures due to TimeOut.  We are using CX3 for our development and the rate at which we receive data from the image sensor is 462Mbps per lane(MIPI 4 lane configuration) . Here, the number of times the CyU3PDmaMultiChannelGetBuffer failures due to TimeOut that occurs with the firmware built in SDK 1.3.4 is much lower than that built in SDK 1.3.1. Kindly let us know what makes this improvement and also how can we further improve this. 

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I am looking to implement PTS and SRC values for my UVC device but am having some difficulty knowing how to source these values. I came across a thread discussing these values but am confused about how the CyU3PGetTime and 0.1us timestamp (explained in this KBA) are used for PTS and SRC's STC value. According to the spec, both PTS and STC rely on dwClockFrequency for units so that makes me think that PTS and STC use the same source clock for their values. Is this correct? If not, which clock should each of PTS and STC use if my clock is set for 403.2MHz and 100MHz GPIF? Do I set dwClockFrequency to 403.2MHz?

My understanding is that both PTS and STC are taken at the start of a new frame when a CY_U3P_DMA_CB_PROD_EVENT event is received. Since they both have the same units, they both come from the same clock source. They are also both constant. Is this correct?

I know SRC includes a frame counter in some higher significance bits but this seems fairly straightforward as it just counts the number of complete frames that pass through the FX3. My only question regarding the counter is how do the bits of my counter align to bits 42-32 of the SRC field?

Thanks

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