USB superspeed peripherals Forum Discussions
The latest Cypress USBSuite Release notes that I can find is on the Cypress website and it is the "Cypress USBSuite Release Notes, Doc. No: 002-23611 Rev. *".
Here are the things that I want to clarify:
Page 2:
USB3.0 Bulk streaming is not supported.
CyUSB libraries do not support more than one device configuration.
Page 3:
Following features are not supported in Control Center application.
The USB Mass Storage and HID class devices no longer supported.
The Insert 100 ms wait and Script parameter functionality is not supported.
The Load monitor and select monitor functionality is not supported.
My questions are:
1. Why has nothing been updated for so many years? Is FX3 not important to Cypress anymore?
2. Why do these limitations exist in the first place? e.g I thought Bulk streaming was a shiny new feature in the USB 3.0 but it is not supported. How come?
Show LessThis is my first post in the forum, so please bear with me. I am working on a project which uses a CYUSB3065 CX3 chip to get images from a MIPI interface to USB Superspeed, and am having problems getting it working reliably. It will sometimes work intermittently, and when it does, the results are fine, but frequently it will just refuse to receive MIPI data.
The first thing that puzzles me are the PCLK_test, HSYNC_test and VSYNC_test outputs from the chip. Where is the documentation that describes how they are generated? When MIPI data is being received, I get sensible signals on HSYNC_test and VSYNC_test pins. When the MIPI data is not being received successfully, I get nothing on those pins.
However, PCLK_test is more confusing. What governs the frequency I should be seeing on there? According to the configuration tool in EZ-USB the pixel clock should be 96MHz (which is correct for my camera). However, I actually measure 76.8MHz on PCLK_test.
This is suspicious because I'm using an external REFCLK of 24MHz rather than the internal 19.2MHz one. However, if the chip had somehow decided to use its 19.2MHz reference clock, the pixel clock would be wrong in exactly that way. I've checked and my 24MHz clock is present and working.
Is there something I've missed? What determines the frequency of PCLK_test?
Thank you
Chris
Show LessHello,
I want to use a jlink to debug my application. Currently I am interested on the values of requests sent from the host application, therefore my breakpoints are inside the CyCx3UvcAppUSBSetupCB, which is the callback registered in CyU3PUsbRegisterSetupCallback(CyCx3UvcAppUSBSetupCB, CyTrue);
I have followed the instructions in EzUsbSuite_UG.pdf to start the debugging session. Since the first try, the initial break point in the main() functions works well, and I can step over the initial functions with no problem. I noticed, however, that once the execution enters CyU3PKernelEntry(), I can say goodbye to the execution flow as it cannot be stopped anymore. I understand CyU3PKernelEntry is a non-return, and that most of the CX3 firmware is closed source, but I would like to at least stop in some point inside the CyCx3UvcAppUSBSetupCB when the host application (v4l2 for example) sends a command to set something (gain in my case). But that doesn't happen if I try after a few seconds that the firmware is running**, breakpoint always fails (see prints below).
** if I add a break point somewhere within CyCx3UvcAppUSBSetupCB, before starting the firmware (while the debug session is stopped in main()) then the breakpoint works. THEREFORE, breakpoint works if set before starting debug, and doesn't work if I set it while the firmware is running in debug mode.
I removed the handling of USB_SUSP_EVENT_FLAG, which puts the CX3 in LowPower as suggested in here https://community.cypress.com/t5/Knowledge-Base-Articles/Segger-J-Link-Known-Issues-with-FX3-CX3-FX3S-KBA229847/ta-p/250116. I also tried setting the clock before DeviceInit as suggested in here https://community.cypress.com/t5/Knowledge-Base-Articles/Fix-Bad-JTAG-communication-Write-to-IR-Expected-0x1-got-0x0-TAP/ta-p/260161. Finally, I also added the absolute file path in here https://community.cypress.com/t5/USB-Low-Full-High-Speed/CX3-JLINK-DEBUGGING/td-p/269347.
Don't know what to try next. Can someone help with this?
Best regards,
Renato.
Show LessThe FX3 is among the flagship products for Cypress. However, so far I have only found a single development for it which is a very basic board, surprisingly basic. It appears like Cypress is treating their flagship product like its not important by not producing a complex board that can be used to demonstrate its features fully, and also stopping production on the CYUSB3KIT-001 which appears to be more complex than the very humble FX3 Superspeed Explorer Kit.
I am curious to know why the CYUSB3KIT-001 is no longer manufactured.
Show LessHi,
I have a problem with the connection between a USB3 chip and an FPGA. The chip is the CYUSB301X or the EZ-USB FX3. We are using a GPIF-II connection between the two. I have put our code below, but it is pretty much the AN65974 example. We deleted a few things that weren't used. Ok, so the problem is that the buffer in the FX3 is often full. We use a GPIF-II connection 16bits width and a clock of 100MHz. We tried using the entire bandwidth but the FLAGa (the flag saying the thread is full) is often up. I tried different speed and simulated throughput, put could only get to 560Mbits/s sustained speed instead of the 1.6Gbits/s that I should be able to get.
Did I do something wrong in the code for the FX3? I tried changing the packet size, number of buffer, buffer size and burst length, but nothing worked.
Any help would be appreciated!
Étienne
Show Less
Hi!
We have a firmware based on AN75779 (UVC Bulk streaming). There are some adjustments to the actual image sensor.
What we notice is, that sometimes (not consistent) with the same binary firmware image, it works very well and sometimes we just get no GPIF payload at all, but just one 12 Byte UVC Header packet per frame.
Investigations have shown, that the GPIF waveform is working perfectly fine (confirmed by toggling CTL outputs and watching them with a logic analyzer). There is a clear ping ponging done between the 2 GPIF threads 0 and 1 and IN_DATA called the expected the expected amount of times.
When logging the 2 GPIF producer Sockets and 1 USB consumer socket register values over time from a second thread, we do see, that when in an operational state:
- The SCK_COUNT data is incrementing for PIB Socket 0 and PIB Socket 1 + UIB as expected
- The STATE of the socket is always active
When we are in a non operational state we see:
- SCK_COUNT of the 2 PIB sockets is constantly ZERO
- The PIB state is sometimes STALL and sometimes ACTIVE
- The UIB is incrementing only once per frame with the expected 12 Bytes of the UVC header (Triggered by Interrupt from GPIF PARTIAL State, calling wrapup, calling indirectly the producer callback
We checked in exactly this situation the GPIF state machine by generating pulses in the 2 data transfer states and they are coming as expected.
The Sensor is clocking the PCLK with 75 MHz.
Could this be an issue of the THREAD controller, that resides between GPIF and DMA socket?
ANY help is appreciated in hints how to debug further.
We checked for return error codes everywhere possible, e.g. the multi DMA setup, but don't get API errors in the non working situation.
The sourcecode can be shared with Cypress, but I don't want to put it in this public forum.
Best regards,
Kai
Attachments:
- APPThread_logfunction.c - The function that creates debug prints. Called every 100ms from within APPThread
The log prints 3 Socket register and THREAD controller configuration
- Logfile_good_state.txt - A Logfile when "everything works fine" All 3 SCK_COUNT registers are incrementing
- Logfile_nonWorking_state.txt - A logfile from the state where the 2 GPIF socket2 don't receive data, allthough IN_DATA state is confirmed to be called in GPIF statemachine
Hello,
I've previously inquired in this forum regarding GPIO sampling synchronous to some other signals with the following timing diagram:
Luckily, someone sent an example firmware (firmware code + GPIF state machine code) which I'm currently using to fully understand and implement the desired mechanism on my board. I just have some questions because there are some items that aren't clear to me even now:
1) I tried getting data using control center and when using one endpoint (0x82), i get a simple loopback. On the other hand, when I use the other endpoint (0x81), I get the following results:
I'm unsure of how to make sense of the received data because based on the timing diagram, I am expecting a 32-bit / 4 byte data.
2) I tried using the firmware and unlike the previous firmware codes I've used, it seems that I'm able to use "transfer IN" even without doing a "transfer OUT". How can I make sure that the data I'm receiving is correct or updated? Because the data might be a duplicate or incorrect.
As of now, these are some things that I need clarification on with regards to the GPIF. Attached here are the files sent to me by one of the engineers from this forum who initially responded to my inquiry.
Thank you for any help you might extend.
Regards,
jl46
My investigation so far into windows drivers is that, it is a highly arcane field with little information available on the internet. Writing drivers was a punishing concept when Windows Driver Model (WDM) was used to write them. The Windows Driver Foundation (WDF) is supposed to have simplified this process. However, it is still a considerably difficult task to become good at.
The FX3 can be used to create superspeed USB peripherals. A USB peripheral is useless if it can't work with a host. Cypress have created CyAPI.lib for use with C++ applications. I have a few questions about this specifically.
1. How exactly does CyAPI.lib insulate a user from knowing how USB drivers are written and in doing so how does it save a person from a necessity to learn WDF?
2. Is CyAPI.lib also compatible with Linux? If not, what options exist to make an FX3 peripheral work in Linux?
3. What are limitations of CyAPI.lib which will require that a person write their own custom drivers using WDF?
4. Are CyUSB.dll used with .NET applications, and the CyAPI.lib fundamentally the same or were written differently from scratch while providing identical API?
5. Why can't CyAPI.lib take place of WDF drivers for all USB peripherals?
Show LessHi,
I need to include a CYUSB3ACC-005 FMC Interconnect Board in a CAD assembly that I'm creating. Is there a model or a detailed drawing available?
Thank you.
Show LessWe want to use CYUSB3KIT-003 for RHEL host. So any driver support is available for same.