USB superspeed peripherals Forum Discussions

Hi Dears:

We are developing CYUSB3065+AR0521,  host app can not streaming images. please give us support, thanks.

(1) Sensor configurations：

RAW8，mipi 4lanes, 2600x1952,8bit 60fps

(2 ) mipi  receiver configurations

(3) UART logs

Prod = 104 Cons = 104 Prtl_Sz = 11264 Frm_Sz = 2540944 B
Prod = 104 Cons = 104 Prtl_Sz = 19744 Frm_Sz = 2549424 B
Prod = 104 Cons = 103 Prtl_Sz = 10528 Frm_Sz = 2540208 B
Prod = 104 Cons = 104 Prtl_Sz = 10528 Frm_Sz = 2540208 B
Prod = 104 Cons = 104 Prtl_Sz = 10800 Frm_Sz = 2540480 B
Prod = 104 Cons = 104 Prtl_Sz = 11296 Frm_Sz = 2540976 B
Prod = 104 Cons = 104 Prtl_Sz = 11020 Frm_Sz = 2540700 B
Prod = 104 Cons = 104 Prtl_Sz = 10528 Frm_Sz = 2540208 B
Prod = 104 Cons = 105 Prtl_Sz = 14128 Frm_Sz = 2543808 B
Prod = 104 Cons = 103 Prtl_Sz = 10532 Frm_Sz = 2540212 B
Prod = 104 Cons = 104 Prtl_Sz = 10532 Frm_Sz = 2540212 B
Prod = 104 Cons = 105 Prtl_Sz = 14892 Frm_Sz = 2544572 B
Prod = 104 Cons = 103 Prtl_Sz = 10532 Frm_Sz = 2540212 B
Prod = 104 Cons = 104 Prtl_Sz = 12332 Frm_Sz = 2542012 B
Prod = 104 Cons = 105 Prtl_Sz = 14920 Frm_Sz = 2544600 B
Prod = 104 Cons = 103 Prtl_Sz = 10532 Frm_Sz = 2540212 B
Prod = 104 Cons = 104 Prtl_Sz = 10532 Frm_Sz = 2540212 B
Prod = 104 Cons = 104 Prtl_Sz = 10976 Frm_Sz = 2540656 B
Prod = 104 Cons = 105 Prtl_Sz = 14584 Frm_Sz = 2544264 B
Prod = 104 Cons = 104 Prtl_Sz = 14016 Frm_Sz = 2543696 B
Prod = 104 Cons = 103 Prtl_Sz = 13876 Frm_Sz = 2543556 B
Prod = 103 Cons = 104 Prtl_Sz = 14880 Frm_Sz = 2520000 B
Prod = 104 Cons = 104 Prtl_Sz = 11016 Frm_Sz = 2540696 B
Prod = 104 Cons = 104 Prtl_Sz = 14588 Frm_Sz = 2544268 B
Prod = 103 Cons = 103 Prtl_Sz = 19084 Frm_Sz = 2524204 B
Prod = 104 Cons = 104 Prtl_Sz = 14936 Frm_Sz = 2544616 B
Prod = 104 Cons = 104 Prtl_Sz = 14928 Frm_Sz = 2544608 B
Prod = 104 Cons = 103 Prtl_Sz = 10600 Frm_Sz = 2540280 B
Prod = 104 Cons = 105 Prtl_Sz = 14880 Frm_Sz = 2544560 B
Prod = 103 Cons = 102 Prtl_Sz = 1120 Frm_Sz = 2506240 B
Prod = 104 Cons = 104 Prtl_Sz = 14428 Frm_Sz = 2544108 B

(4) PCLK, HSYNC, VSYNC signal, hsync signal looked wrong something.

Hi,

Our system configuration:
PC <-> HX3PD <-> FX3_A and FX3_B <-> FPGA <-> sensor.

Our customer complain that FX3 will get corrupt after an hours. The symptoms is only either one for the fx3 will corrupt only.
For the non-corrupt fx3, it still able to do control end point R/W and receive frame thru bulk in.
The only way to recover the corrupt FX3 is to replug the usb physically. Software Reset FX3 would not work as it has lost the communication.
Also found that when issue happened, on control center only one FX3 device is shown. (It suppose to show two fx3 devices if working normally)

Configuration
FPGA will send out one frame split into FX3_A and FX3_B at same time. We have confirm internally the FPGA has output the frame correctly.
Our driver version 1.2.0.23 (we dint update to latest as the latest driver not working with our firmware)
FX3 is power line is by PC power.
Both FX3 loaded same firmware.
Customer SW using C# CYAPI and uses Async Transfer(BeginXfer/FinishedXfer).

Firmware DMA:
//Create a DMA MULTI channel for sending the video data to the USB host.
CyU3PMemSet((uint8_t *)&dmaCfg, 0, sizeof(dmaCfg));
dmaCfg.size = 16*1024;//burstLength*size;//16* size; //16*1024
dmaCfg.count = 6; //6 //5
dmaCfg.validSckCount = 2;
dmaCfg.prodSckId[0] = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_0;
dmaCfg.prodSckId[1] = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_1;
dmaCfg.consSckId[0] = (CY_U3P_UIB_SOCKET_CONS_3);
dmaCfg.prodAvailCount = 0;
dmaCfg.prodHeader = 0;
dmaCfg.prodFooter = 0;
dmaCfg.consHeader = 0;
dmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE; //CY_U3P_DMA_MODE_BUFFER
dmaCfg.notification = CY_U3P_DMA_CB_PROD_EVENT| CY_U3P_DMA_CB_CONS_EVENT;
dmaCfg.cb = CyFxApplnDmaCallback;
apiRetStatus = CyU3PDmaMultiChannelCreate(&glChHandleMultiCh,
CY_U3P_DMA_TYPE_AUTO_MANY_TO_ONE, &dmaCfg);

Test we do:
On Customer SW, we tried increase queue from 64 -> 256 issue still exists
Ran Cypress streamer example bulkin example for 4 hours with both fx3 at same time, no fail observed. Each FX3 running at 400mbps.
Run with customer SW will break after an hour ++.
Unfortunately we do not able to print the debug log from FX3 due to hardware limitation, is there a way to probe FX3 or debug method for this, or any idea might be happening?

I will DM you the Firmware if needed.
Thanks

Hello, we have a Transreciever (FPGA) board, and to connect to the PC to communicate with the software we are using CYUSBKIT-003 superspeed board for usb 3.0 communcation. before me, the other engineer has wrote a manual about the programming procedure of the board, which involeves putting all 4 jumpers, connecting the board to the pc and loading the firmware using "control center" software from EZ usb suite. the firmware to load is "SlaveFifoSync.img". once it is successful then remove the jumpers 4 and 5 and it should work. i have followed all these steps and i am getting sucess when i load the firmware. to load in control center, we have to select program, FX3, I2C eeprom and than select the .img file. however, after doing all these steps I am still unable to communicate with the boards which i have programmer, the boards which were programmed earlier or working fine. what should I do, what could be the problem? this is my first time with this board, so i dont know properly how to use it. 

I'm maintaining a programm that was left behind by a previous owner, but it's 10 years old, and I don't quite know where to start with the following bug, please give me some direction.

We modify the FPGA code  from the TB-FMCL-USB30 example. Below is the block diagram from there spec. The firmware, GPIF II on  FX3 is the same as the original code. We added 2 FPGAs Slave boards. The Master and Slave boards have their own custom bus, the PC accesses the registers on the two Slave boards through writing specific registers on the Master board.

We found a problem:when the PC reads the register of a specific address on the Slave board, it is normal at the beginning, but after a few seconds, the Xferdata function of the application code on the PC reports an error. I observe that the ILA of the GPIFII on the FPGA has no signal, so it seems that the FX3 is not working anymore. I had to call the CCyUSBDevice constructor to re-establish an instance to get it back to normal, but after a few seconds, the same error would occur again.

Also replacing the cable with a USB2.0 cable doesn't seem to have this problem.

Attached is original spec

We use the CyUSB3.sys driver with our hardware.  We use just that file with our INF and a CAT file that now needs to be signed by Microsoft.

For Windows 11 Microsoft created the new "Static Tools Logo Test."  This test requires that a Driver Verification Log (DVL) be supplied.  The DVL is created by running tests on the source code of the driver.

The source code that can be downloaded from your website is v1.2.3.16 and it does not pass the Static Driver Verifier tests.  While I may be able to fix the "Defects" that were found I would not be able write the source code for any additional features that were added between v1.2.3.16 and v1.3.0.2

1) Will the source code for v1.3.0.2 be provided for download so that I can pass the Hardware Lab Kit tests and submit the SYS, INF, and CAT files for signing by Microsoft?

2) An alternative would be to provide the Device Verification Logs that prove that the driver passes the tests and meets all of Microsoft's current requirements.

Thanks

Does Infineon support MIPI-CSI or DVP (Digital Video Port) to WiFi or Bluetooth directly or through an MCU?

Omnivision provides small image sensors with several interfaces including MIPI-CSI and DVP.
Infineon appears to support MIPI-CSI to CX3 and DVP to FX3 for conversion of the image to USB 3.x.
Reference post, "We have signed a NDA with OmniVision in order to get the source code for the OV5640" at https://community.infineon.com/t5/USB-superspeed-peripherals/We-have-signed-a-NDA-with-OmniVision-in-order-to-get-the-source-code-for-the/td-p/273144

Greg

Hi,

Im trying to enable power management tab in FX3 driver. as you can see in the image below there isnt power management tab:

Im trying to enable Low power states in FX3 using example lowpowertest

This is what I expect to be look like

Hello,

I have been attempting to develop a UVC device based on the CYUSB3065-BZXI and a Sony IMX258. I have based my project on the AN75779 example. I have managed to get I2C communication to the sensor and I have MIPI data being sent to the CX3 or so I believe, I am getting the following output from debug over USB:

CyU3PMipicsiInit = 0
CyU3PMipicsiSetIntfParams = 0
CyU3PMipicsiWakeup = 0
Setting GPIO and XSHUTDOWN HIGH
Reset complete
checking I2C
addr: 0x35 buf0: 2 buf1: 58
I2C Success
Setting imx258_reg_mipi_data_rate_640mbps
Setting imx258_reg_mipi_1048_780
Application Started
UVC: Completed 0 frames and 0 buffers
Backflow detected...
MIPI Error Count= 0
UVC: Completed 34 frames and 30 buffers
MIPI Error Count= 0
UVC: Completed 69 frames and 18 buffers
MIPI Error Count= 0
UVC: Completed 104 frames and 6 buffers
MIPI Error Count= 0
UVC: Completed 138 frames and 24 buffers
MIPI Error Count= 0
Clear feature request detected...
Application Stopped

I think I may be having issues with the USB descriptors, but I am not really familiar with this. I have attached the project, is there anything obvious I'm missing?

Hello,

My system consists of two parts: a UVC stream sender and a UVC stream receiver. The UVC stream generated from the webcam is transmitted to the receiver wirelessly. The receiver is connected to the computer with a USB cable, and I can monitor the video generated from the camera.

The receiver has to handle multiple cameras, so I wanted to handle them with a single USB descriptor for simplicity.

For example, let’s say Camera A sends MJPEG 1080p with 30fps only, while Camera B sends the same format but with a different FPS, such as 60fps only.

I’m not sure whether it’s possible to handle those two cameras with only one USB descriptor in the receiver. If this is possible, then USB descriptors for both cameras should be combined as one descriptor, I think.

Regards,

Rossi

Hi all,

I am working on creating a 2nd-stage bootloader in accordance with the general design laid out in Solved: FX3 Boot / Firmware Update Best Practices - Infineon Developer Community, but I am running into issues with creating the fallback mechanism to be used when both firmware images are invalid. I have tried using the source code of the usb boot example (found in C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\boot_fw\src) which does allow my device to correctly show up in the control center. However, when I try to load another image over ram (which is what I expect to need to be able to do in the event that both firmware images in flash are invalid), I get an error from control center saying "programming failed"?

Does anyone know what would cause the programming to fail? Or alternatively, know what code I need to add in order to properly handle loading a firmware image over RAM in my second-stage bootloader?

Thanks in advance,

Dan