USB superspeed peripherals Forum Discussions

I want to rewrite the FW of FX3 without using the Control Center.

Currently, FX3 FW rewriting starts the board in "USB BOOT mode", recognizes it as a Bootloader Device on the PC side, and writes to SPI FLASH from the USB Control Center of the Windows application.

Is there any material or sample source code about the specific writing method to SPI FLASH performed by this USB Control Center?

If it can use this tool by calling it from a script, I would use it.

Thanks
Tetsuo

Hi FX3 team,

From the example code in slavefifo_example\slfifosync, the UART in CyFxSlFifoApplnDebugInit (void) in the example code is pointing to CY_U3P_LPP_SOCKET_UART_CONS. meaning the UART message will be send to the physical UART port  in cypress FX3 IC. 

Can i reuse back the same code with minor change on :

• From the example : CyU3PDebugInit (CY_U3P_LPP_SOCKET_UART_CONS, 😎
• My changes              : CyU3PDebugInit (CY_FX_EP_CONSUMER_CDC_SOCKET, 8), this is assuming that the USB serial com port is already make available in windows device manager.

and direct the UART message via USB to the host-PC and read it with teraterm terminal? 

the example code i am refering to with the minor change is as in the picture attached.minor change in line 40

Hello, 

          For the last few days, I'm trying failsafe firmware update as explained here     , I'm using the same code and followed the same steps as mentioned,  first I merged 2nd stage boot loader and UsbBulkSrcSink and then flashed to my Denebola Kit, and It successfully shows itself as a device in the control center, but later when I try to update new firmware(USBBulkloopAutoEnum from examples) with given Firmware Updater, I flashed new firmware with given Firmware updater, but It didn't execute in Denebola Kit. Even in the control center, I didn't get anything to see.

Hello,

        I want to send vendor-specific commands from the Control center to the Denebola kit, How to do that?

and In the control center, I found the load script icon, for what it is used? is that one to send vendor commands?

Hello, I'm using the Denebola kit, I'm trying to write data to SPI flash, I  don't get any error while writing data, but when trying to read back I get a value as 0, one more thing to notice is, at some locations values is same as what I have I written.

Let me explain the whole thing clearly, present I'm using a failsafe firmware update, this is the source:https://community.infineon.com/t5/Resource-Library/FX3-Fail-Safe-Firmware-Update/ta-p/246074

but as explained there I'm not using I2C, instead, I'm using SPI,  and I'm using the merger provided in the source to combine Images, so my partition is the same as explained in the source.

i.e,    bootLoader Partition starts at 0x0000

          Primary Firmware   starts at   0x6000

         Secondary Firmware starts at 0x23000

I'm able to boot to primary Firmware and Secondary Firmware,

I'm using the USBBulkSrcSink example provided in the source, in there I tried to write data to the 0x6000 location and read the data,

the values  which are written is stored perfectly, but using the same process I tried to access 0x3FFFF values are not reflecting while reading, even I don't get any error while writing.

screen shot is shared :

Red bix shows code and green box shows output

I'm trying to run FX3 for compliance testing. But It can't enter test mode. Are there any conditions to enter test mode?

Also, is there a way to tell if FX3 has entered test mode?

Thanks,
Tetsuo

Hi All, 

I am using a custom board where Fx3 USB controller is connected to Xilinx FPGA.
I am trying to create an board level Vhdl/Verilog test bench where Fpga is instantiated as DUT component and
FX3 as a test peripheral component.

Is there any VHDL/Verilog simulation model available for Fx3 USB Controller?

Thanks in advance,

Panneer Raja Vajravelu.

Hello,

I have study to this thread and other multiple FX3 transmission. Some simple question to clarified as below:

https://community.infineon.com/t5/USB-superspeed-peripherals/Multi-FX3-Usb-deivce/m-p/345350 

1.) May I know is possible to have setup as below? (Attached photo)

2.) Currently we have one working .img file where the we could success read/write data between FPGA<->FX3<->PC.
Based on the Two FX3 Configuration picture, Can FX3_A and FX3_B share the exact same .img file without modification? Meaning Only modified on host C code, where set endpoint1, endpoint2 like example ConsoleApplication1 provided?

Thank you.

Thanks

If I need to use multiple endpoints of fx3, should I use them in order? That means I should use ep1, then ep2, ep3, and so on.

Can I not use ep2, instead, I use ep3 or ep4, for example? 

I found when I used ep1, ep2, ep3, my project can work; But if I used ep1, ep2, ep4,  the project will go wrong.

Is this the rule for using the endpoints of fx3? But I have not found the rule in any reference documents of fx3.

Or I have something else wrong?

Thanks a lot.

Hi,

I am working with a sensor at 1280x720@30fps YUV422_8 output, I want to use 24bit-bus to transfer data. But when I set up this project, I found there was data padded to the frame, and I can't preview the frame directly by Amcap. I understand it is because the line size can't be divided by 24bit, then there is data padding. So I want to know how the data is padded to each frame, and how to get rid of the padded data on each frame?