USB superspeed peripherals Forum Discussions
Hi,
I have configured PMODE to SPI flash boot mode in our custom board. But it is falling back to USB boot mode.
I tried to ensure the state of PMODE pins as mentioned in this article. In my case, PMODE[2] is pull-down, PMODE[1] is floated and PMODE[0] is pull-up with 10K resistor. According to FX3 datasheet(Table 8), the voltage from Vcc*0.9 is interpreted as HIGH and voltage till Vcc*0.1 is interpreted as LOW. For PMODE[2] and PMODE[1] I got LOW(0) and Float(Z) respectively. But for PMODE[0] I'm getting float(Z) instead of getting HIGH(For SPI boot mode 0Z1).
Here I would like ask two things
1. Am I correctly interpreting HIGH and LOW voltages?
2. How do I make PMODE[0] state as 1 ?
Show LessHi,
I am following this to update firmware in SPI flash over HID interface. I want to make some changes in the source files of HID app to match my custom UVC device. I am unable to recompile it. I am using visual studio code to compile it but I am getting compile time errors like undefined reference to `HidD_GetInputReport' , undefined reference to `HidD_SetOutputReport' . Could you please tell me that which IDE tool I have to use to get it done.
Help is more appreciated.
Thank you,
Shafi.
Show LessMy GPIF state machine begins with:
The DR_GPIO assert debug LEDs that uniquely identify which state the GPIF is in. Occasionally I will start a transfer and the LEDs will light up the code for LOAD_TRIG_CNT forever, meaning DMA_RDY_TH0 never asserts.
Here is my code for starting the GPIF and DMA:
case 0x97:
//make sure the GPIF is in the disabled state before restarting it
CyU3PGpifDisable(CyTrue);
//reset overflow count
overflows=0;
commit_failure = 0;
commit_failure_code = 0;
prod_total=0;
prod_this_rearm=0;
cons=0;
DataSignature = 0;
DataSignature2 = 0;
CyU3PDebugPrint (2, "Start ACQUIRE! (wIndex: %d) %d\r\n",wIndex, DataSignature2*256+DataSignature);
CyU3PGpifDisable (CyFalse);
CyU3PUsbSetEpNak (CY_FX_EP_CONSUMER, CyTrue);
CyU3PBusyWait (125);
apiRetStatus = CyU3PDmaMultiChannelReset (&glDmaChHandleMulti);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PDmaMultiChannelReset failed, error code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
apiRetStatus = CyU3PUsbFlushEp (CY_FX_EP_CONSUMER);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PUsbFlushEp failed, error code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
CyU3PUsbSetEpNak (CY_FX_EP_CONSUMER, CyFalse);
CyU3PBusyWait (125);
//added to new procedure
apiRetStatus = CyU3PDmaMultiChannelSetXfer (&glDmaChHandleMulti, CY_FX_GPIFTOUSB_DMA_TX_SIZE, 0);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PDmaMultiChannelSetXfer failed, error code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
//Completely reset the entire GPIF state to be safe
apiRetStatus = CyU3PGpifLoad (&CyFxGpifConfig);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PGpifLoad failed, error code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
//set the control counter to the current buffer size minus 1
CyU3PGpifInitCtrlCounter(1,(CY_FX_DMA_BUF_SIZE/gpif_sample_bytes)-1,CyFalse,CyTrue,1);
CyU3PGpifInitDataCounter(0,triggerLength-1,CyFalse,CyTrue,1);
CyU3PGpifInitAddrCounter(0,triggerCount,CyFalse,CyTrue,1);
apiRetStatus = CyU3PGpifSMStart(START, ALPHA_START);
if (apiRetStatus != CY_U3P_SUCCESS)
{
/* Error Handling */
CyU3PDebugPrint (1, "Starting GPIF state machine failed, Error Code = 0x%x\r\n", apiRetStatus);
}
/* Update the flag so that the application thread is notified of this. */
glIsApplnActive = CyTrue;
CyU3PUsbAckSetup ();
isHandled = CyTrue;
break;
The only message that prints on the debug log is:
Start ACQUIRE! (wIndex: 0) 0
Thus none of the calls (e.g. CyU3PDmaMultiChannelSetXfer) failed, yet the DMA engine never successfully started. After this happens the FX3 seems to work normally but the DMA remains nonfunctional until power cycled. Is there anything I can do to troubleshoot this condition?
Show LessWhat options are available to initiate or re-initiate a boot sequence for an FX3 device?
For a case where an FX3 is NOT receiving power from the USB bus, but there is a desire to boot from a host over the USB, the FX3 will timeout if it comes up before the host. One option here is to reset the FX3 after the host comes up. Are there other options?
Section 4.3.7 "USB suspend/resume" of Application Note AN76405 "EZ-USB™ FX3/FX3S boot options" states "The FX3 bootloader will enter the suspend mode if there is no activity on USB. It will resume when the PC resumes the USB operation."
Per Table 6 "Entry and Exit Methods for Low-Power Modes" in the CYUSB301X datasheet, transitioning of the D+ or D- lines with bring the FX3 out of Suspend Mode.
If the FX3 went into Suspend Mode before a successful boot, will it re-attempt to boot?
Table 1 in section 3 of AN76405 notes the fallback for USB Boot is USB. How many times will it re-try?
If an FX3 won't keep trying to boot, is Reset the only way to force an FX3 to re-try a boot over USB?
Greg
Show LessHello all,
Most of the data I'm trying to transmit seems to be going between the FX3 and the other chip just fine, but I'm periodically getting zero length packets seemingly coming from nowhere. I've been trying to debug this, but everything I've tried has been a dead end so far.
I'm trying to use the FX3 to connect an 8051 on our board with a host application on a windows PC. My setup is as follows:
- An 8051 that has the microcontroller business logic.
- It receives input from the host from GPIF-II addresses 1 (buffered) and 2 (immediate), sends responses on 3, and there's logging macros that use address 4.
- It's mostly legacy code, except what I've changed to make it work with the FX3.
- The FX3 that's mainly passing data between the host and the 8051
- I'm using the GPIF-II interface. The state machine I'm using is basically the async slave fifo interface provided as a sample, except that I've changed some of the pin numbers.
- USB addresses 2, 4, 6, and 8 are connected to GPIF-II addresses 1, 2, 3, and 4 respectively.
- I have an additional USB endpoint 10 that I'm using for debugging. Every time data a packet is added to one of the other buffers, I sent the contents and a little metadata to the host. This way, I can debug problems between the FX3 and the 8051 independent of the production app running on the host.
- On the Windows Host PC, I have the production app that's trying to use endpoints 2, 4, 6, and 8 to talk to the 8051. There's some other issues there that I still need to investigate, but it's at least able to consume data from the buffer so they never get too full.
- Also on the windows PC, there's a logger app that connects to endpoint 10, and formats and prints the packets that the FX3 has received from the 8051.
Now the problem I'm seeing is that, the 8051 sends a keepalive signal periodically to the host app, and every once in a while, we get a zero length packet as well.
Here's what I've tried in my investigation:
- I've set breakpoints in the 8051 code to check if the actual data we tell it to send really is zero, and it never gets triggered, so I can be sure that we don't ever try to send a ZLP. I've verified that the pins I'm using to communicate with the 8051 are only touched in the 4 read and write functions that I expect them to, so the breakpoints I mentioned should cover every situation.
- I've verified that the order in which the pins change to control the state machine is correct. That is to say to write to the buffer:
- SLWR = 0
- Write Data
- if this is not the last byte, SLWR=1 and go back to 1.
- If this is the last byte:
- PKTEND = 0
- SLWR = 1
- PKTEND = 1
- My coworker who designed the board suggested that timing issues could mean the state machine is in a different state than I thought it was, so I've done the following to check timing:
- In the FX3 manual, it says the GPIF-II "Enables interface frequencies up to 100 MHz", which I assume means that it can change state at least once every 10ns. In the state machine, changing a single pin causes at most 3 state changes before it reaches a stable state, so I tried adding a 30ns delay after every time we change a pin. Then when that didn't make a difference, I added another 30ns just in case, but still no dice.
- Then I tried adding a full 1ms delay for good measure after every time I changed a pin, which changed nothing either. I figured this would cover my bases if I was mistaken about how fast the state machine transitions.
I suspected that maybe there's noise or something changing the PKTEND pin long enough to trick the state machine into sending a ZLP, but my coworker has already dismissed that notion. He's the hardware guy, so I can't really make him check it, and he didn't leave a way to attach a scope or anything to the pin, so wouldn't be easy.
If anyone has any suggestions of what might be going wrong, or ideas for other things I could test, I'd love to hear them.
Show LessHello,
Can anyone tell me how to add Descriptors of USBBulkSourceSink example to OV5640 example, to support vendor specific commands sent by Firmware updater provided in failsafe firmware update?
Show LessI am facing error handling problem with FX3-based camera which leads to significant frame loss after an error occurs.
Camera configuration: 640 x 512, 16-bit, 50fps, ~262MBit/s = 32.7MB / s
FX3 configuration: USB 2.0 only, AN75779 based firmware, SDK version 1.3.4 and 1.3.5 (unofficial release)
After the host detects an error -71 it initiates a restart of the video stream, which results in a pause of about 1000 milliseconds between issuing CY_U3P_USB_SC_CLEAR_FEATURE and CY_FX_UVC_STREAM_EVENT which leads to a loss of 50 frames. Most likely, such a pause in case of an error -71 is set by the software on the host side, which, unfortunately, I cannot influence.
Some FX3 UVC device debug UART logs ( timestamp format: seconds.milliseconds )
9390.335 - UVC: Completed 5149 frames and 2 buffers, DMA(Watermark) = 2
9391.335 - UVC: Completed 5199 frames and 2 buffers, DMA(Watermark) = 3
9391.644 - Clear feature request detected..., DMA(WM) = 2
9391.645 - Application Stopped
9391.645 - UVC: Completed 0 frames and 0 buffers, DMA(Watermark) = 2
9392.645 - UVC: Completed 0 frames and 0 buffers, DMA(Watermark) = 0
9392.648 - Application Started
9392.648 - UVC: Completed 0 frames and 0 buffers, DMA(Watermark) = 0
9393.648 - UVC: Completed 49 frames and 29 buffers, DMA(Watermark) = 2
9394.648 - UVC: Completed 99 frames and 30 buffers, DMA(Watermark) = 2
9395.648 - UVC: Completed 149 frames and 30 buffers, DMA(Watermark) = 2
9396.648 - UVC: Completed 199 frames and 30 buffers, DMA(Watermark) = 2
9397.648 - UVC: Completed 249 frames and 30 buffers, DMA(Watermark) = 2
9398.648 - UVC: Completed 299 frames and 30 buffers, DMA(Watermark) = 3
The goal is to reduce this pause as much as possible. I am thinking about strategy described in KBA231382 article with monitoring difference between commited but not consumed DMA buffers to avoid this error at all, but it looks like I didn't quite get the idea.
The first thing I would like to get is a number of DMA buffers already sent by FX3 but not yet received by host as a threshold criteria to temporarely stop producing more data from GPIF state machine:
static uint8_t DMABufferWatermark = 0;
static uint8_t DMABufferWatermark_Max = 0
void CyFxUvcApplnDmaCallback (
CyU3PDmaMultiChannel *chHandle,
CyU3PDmaCbType_t type,
CyU3PDmaCBInput_t *input
)
{
CyU3PDmaBuffer_t dmaBuffer;
CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
if (type == CY_U3P_DMA_CB_PROD_EVENT)
{
#ifdef FRAME_TIMER_ENABLE
/* Received data from the sensor so stop the frame timer */
CyU3PTimerStop(&UvcTimer);
/* Restart the frame timer so that we receive the next buffer before timer overflows */
CyU3PTimerModify(&UvcTimer, glFrameTimerPeriod, 0);
CyU3PTimerStart(&UvcTimer);
#endif
/* There is a possibility that CyU3PDmaMultiChannelGetBuffer will return CY_U3P_ERROR_INVALID_SEQUENCE here.
* In such a case, do nothing. We make up for this missed produce event by making repeated commit actions
* in subsequent produce event callbacks.
*/
status = CyU3PDmaMultiChannelGetBuffer (chHandle, &dmaBuffer, CYU3P_NO_WAIT);
while (status == CY_U3P_SUCCESS)
{
/* Add Headers*/
if (dmaBuffer.count == CY_FX_UVC_BUF_FULL_SIZE)
{
/* A full buffer indicates there is more data to go in this video frame. */
CyFxUVCAddHeader (dmaBuffer.buffer - CY_FX_UVC_MAX_HEADER, CY_FX_UVC_HEADER_FRAME);
}
else
{
/* A partially filled buffer indicates the end of the ongoing video frame. */
CyFxUVCAddHeader (dmaBuffer.buffer - CY_FX_UVC_MAX_HEADER, CY_FX_UVC_HEADER_EOF);
#ifdef DEBUG_PRINT_FRAME_COUNT
glFrameCount++;
glDmaDone = 0;
#endif
}
/* Commit Buffer to USB*/
status = CyU3PDmaMultiChannelCommitBuffer (chHandle, (dmaBuffer.count + CY_FX_UVC_MAX_HEADER), 0);
if (status == CY_U3P_SUCCESS)
{
DMABufferWatermark++;
#ifdef DEBUG_PRINT_FRAME_COUNT
glDmaDone++;
#endif
}
else
{
if(glDmaResetFlag == CY_FX_UVC_DMA_RESET_EVENT_NOT_ACTIVE)
{
glDmaResetFlag = CY_FX_UVC_DMA_RESET_COMMIT_BUFFER_FAILURE;
CyU3PEventSet(&glFxUVCEvent, CY_FX_UVC_DMA_RESET_EVENT, CYU3P_EVENT_OR);
}
break;
}
/* Check if any more buffers are ready to go, and commit them here. */
status = CyU3PDmaMultiChannelGetBuffer (chHandle, &dmaBuffer, CYU3P_NO_WAIT);
}
}
else if (type == CY_U3P_DMA_CB_CONS_EVENT)
{
if (DMABufferWatermark > 0)
DMABufferWatermark--;
streamingStarted = CyTrue;
glCommitBufferFailureCount = 0; /* Reset the counter after data is consumed by USB */
}
DMABufferWatermark_Max = max(DMABufferWatermark_Max, DMABufferWatermark);
}
void UVCAppThread_Entry (uint32_t input)
{
for (;;)
{
apiRetStatus = CyU3PEventGet (&glFxUVCEvent, CY_FX_UVC_STREAM_ABORT_EVENT | CY_FX_UVC_STREAM_EVENT | CY_FX_UVC_DMA_RESET_EVENT | CY_FX_USB_SUSPEND_EVENT_HANDLER, CYU3P_EVENT_OR_CLEAR, &flag, LOOP_TIMEOUT);
...
CyFxUVCAppDebugPrint(4, "UVC: Completed %d frames and %d buffers, DMA(Watermark) = %d", glFrameCount, (glDmaDone != 0) ? (glDmaDone - 1) : 0, DMABufferWatermark_Max);
DMABufferWatermark_Max = 0;
}
}
It seems like DMABufferWatermark_Max is around pretty normal 2..3 even in case of -71 error and never comes close to all 8 available DMA Buffers which I expect as a pre-error criterion.
How to correctly implement the recommendations given in the article KBA231382 in the software code?
Regards,
Sergiy
Show LessDear Supporter,
I have a question, describe the situation,
In a UVC/UAC/AI project , There are create three thread in the firmware, one for video、one for audio and the other one for AI data. Those data are all transmitted from the FPGA.
In my case , I have already set Thread_0_DMA_Ready(for video)、Thread_1_DMA_Ready(for audio)、Thread_2_DMA_Ready(for AI data) in GPIF II tool. as below figure. And I have call CyU3PGpifOutputConfigure() API to set DMA default configure in firmware source code ,
The result of the program execution is that everything is normal, but when I write/read FPGA register , it will cause the state machine to misbehave, like HRef & VSync sensor signal not follow state machine rule. Finally , I found out after testing many times.
Because the hardware video DMA always keep active high without change to low, so it affects the VSync and HRef signal.
But when I set
CyU3PGpifOutputConfigure(6, CYU3P_GPIF_OP_DMA_READY, CyTrue);
CyU3PGpifOutputConfigure(11, CYU3P_GPIF_OP_DMA_READY, CyTrue);
CyU3PGpifOutputConfigure(12,CYU3P_GPIF_OP_DMA_READY, CyTrue );
The hardware video DMA become normal, even when reading and writing the FPGA register, it is executing normally.(still side effect, but video data transmitted ok )
Can someone tell me what's going on? and what's the difference between the two(CYU3P_GPIF_OP_THRn_READY & CYU3P_GPIF_OP_DMA_READY )?
Thanks everyone.
Show LessHello
I don't understand the role of VBAT.
If I use VBUS, what do i need VBATT for? can i operate the device with VBUS only(no VBATT)? can I operate the device with VBATT only (no VBUS) ?
Reagrds,
Assaf
Show LessDear All,
I tryed to download with USB Control Center. I selecetd this option : Program -> FX3 -> RAM.
But this tool said "Bootloader is not running : Please reset your device to download firmware."and I can not continue to download process.
I confirmed Streamer tool was running correctly, but in Bulkloop tool, does not work well showing "no device".
I installed SDK including host driver and "Cypress FX3 USB StreamerExample Device" was shown in device manager in win7.
My environment is as follows.
・SuperSpeedExplorerKitSetup_RevSS
・Windows 7 64bit
・CYUSB3KIT-003
How can I download firmware?
Best Regards.
Shiro
Show Less