Recent discussions
Infineon's EZ-USB FX3S and SD3 support both support RAID 0 and RAID 1. Do any products support other RAID levels, specifically RAID 5?
RAID 0 is Block-level striping without parity or mirroring
RAID 1 is Mirroring without parity or striping
RAID 5 is Block-level striping with distributed parity
Greg
Show LessHello,
I am using GPIO pins to generate some on off sequence on pin. But while generating it sometimes my sequence gets stretched as attached in file. here i am using Simple GPIO.
I am using for loop for the same.
for(i=0; i<=7; i++)
{
CyU3PGpioSimpleSetValue(45,CyTrue);
CyU3PBusyWait (1);
CyU3PGpioSimpleSetValue(45,CyFalse);
CyU3PBusyWait (1);
}
Let me know what i am missing.
Show LessHi team,
I added different resolutions to my custom camera board with the help of this link .
I have taken care of probe control settings and descriptor settings while adding different resolutions.
Currently I am facing some issues and I would like to have a help from you.
1. I can able to stream 13MP resolution over USB 2.0 but for some lower resolutions like VGA I'm getting black screen in AMCap. But I am getting image in windows camera app, why is this happen ? Did I miss anything?
2. 13MP resolution streaming is perfectly being done and I have added still capture capability to it. When I try to capture image, the streaming is getting interrupted and on to UART log side I'm getting DMA_RESET(continuously starting and stopping the App). May I know why this happening?
Your help is most appreciated.
Thank you,
Abdul.
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I need to use the cyusb3kit-003 SuperSpeed Explorer kit to develop a "logic analyzer" that writes from 16 bit parallel input to windows disk through USB3. I have a USB2 device that takes data to a buffer, but the readout won't keep up with input.
It is simple. I need an EXE file for execution under windows command prompt that takes data and writes to binary disk like my current unit. I am not a programmer, so I need to find someone to do the programming. I use a high level language to read the binary file and process it.
The web pages lead me in endless circles, and the associates list does not seem to know about the SuperSpeed device. Short of learning binary coding which I do not have enough time to do, I see no help.
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I've been trying to implement a SPI interface on FX3 in order to reprogram a flash IC driving an FPGA, similar to the implementation described in AN84868 . I've been able to read from and write to the flash chip when I load slightly modified* versions of the USBFlashProg and UsbSpiDmaMode examples into RAM, but if I build the same code as an I2C image and load it onto the FX3's I2C boot EEPROM, the FX3 crashes and returns nothing but code 997 as soon as I make a SPI request.
Things I've already tried:
1) All three available speeds, 64k and 128k I2C sizes in elf2img.exe's -i2cconf argument. Of the settings that could be successfully programmed to the I2C EEPROM, none of them had any discernible effect
2) Performing a SPI read operation while the SPI mux select pin* is pulled low; this doesn't cause a crash, but the data returned is all zeroes (for obvious reasons)
3) Changing the DMA timeout value from 0xFFFFFFFF to 0x00004000 -- no effect at all
4) Checking SPI busy status before performing a SPI read operation -- the check busy status command also crashed the FX3.
5) Using I2C in register mode instead of using DMA -- no effect
6) Commenting out all of the "if (status != CY_U3P_SUCCESS) {return status;}" statements -- no effect
7) disabling and reinitializing SPI and I2C before making any SPI requests -- no errors were returned during DeInit and Init calls for I2C and SPI, but the crash happened as soon as I made a SPI request
8 ) Commenting all I2C functions out and setting io_cfg.useI2C to CyFalse.
I'm out of ideas. I can't think of any reason that booting from I2C should have any impact on SPI operation in a way that wouldn't be solved by one of the things I tried. Has anyone else encountered anything like this?
* An external mux select needs to be pulled high to give the FX3 access to the SPI flash IC, but it's driven from a GPIO so I just use CyU3PSetSimpleConfig() with .outValue set to CyTrue.
EDIT: I was able to capture oscilloscope readings on the MOSI trace between the FX3 and the SPI flash. Here's a capture of a CY_FX_RQT_SPI_FLASH_ERASE_POLL when the image is loaded via RAM:
and here's the same command running the exact same image booting from I2C:
I've seen this happen on every command -- if the FX3 was booted from I2C, the MOSI line has a lower-voltage "echo" after each pulse. Additionally, there is no activity at all on the MISO line after booting from I2C no matter what commands are sent.
When a SPI read request is made after booting from I2C, the FX3 continually broadcasts the same pulse and echo until power is removed, suggesting that the crash is happening because the FX3 is stuck in a loop attempting to make contact with the SPI flash IC. However, setting a timeout in the SPI configuration settings does not fix this issue.
Show LessI have an FX3S design which I would like to transition from I2C boot to eMMC boot (connected to the Sib port). I see information in the manual on how to attempt that directly with the PMODE pins. Unfortunately, my design uses a version of the two-stage bootloader (I2C) to allow device updates and the boot_fw library doesn't support Sib boot, is that true?
Is it possible to implement a two-stage bootloader with only the eMMC? I would like to eliminate my I2C eeprom components.
Thanks!
Show LessHi All,
We are using CX3 as our MIPI to USB3.0 bridge solution. We are running into issues where some of the boards initially report an error from the MIPI side.
Errors are as per below
mdlErrCnt : Multi-Data Lane Sync Byte Error Count
eidErrCnt : Unsupported Packet ID Error Count
recrErrCnt : Recoverable Packet Header Error Count
Please find MIPI to CX3 schematics
[EDIT] : Also attaching log from tera-term and firmware debug firmware for reference.
#ifdef PRINT_FRAME_INFO
if (Printflag == 1)
{
/*For video streaming application of higher FPS refrain from using this debug print or try to reduce the print information*/
char str[100];
int pos = 0;
sprintf(str,"\n\rProd = %d Cons = %d Prtl_Sz = %d Frm_Cnt = %d Frm_Sz = %l B", TxCountflag, RxCountflag, PartialBufSize, FrameCount, ((TxCountflag*CX3_UVC_DATA_BUF_SIZE)+PartialBufSize));
print(str);
Printflag = 0;
if (fpsflag == 1)
{
fps = 30000/(time1 -time0); //FPS calculate using time difference for 30 frames
print("\n\rTimeDiff = %d ms FPS = %d", (time1 -time0), fps);
fpsflag = 0;
}
/* Uncomment the code below to check for MIPI errors per frame*/
#ifndef FX3_STREAMING
CyU3PMipicsiGetErrors( CyTrue, &errCnts);
char str1[200];
sprintf(str1,"\n\r%d %d %d %d %d %d %d %d %d",errCnts.crcErrCnt,errCnts.ctlErrCnt, errCnts.eidErrCnt, errCnts.frmErrCnt, errCnts.mdlErrCnt, errCnts.recSyncErrCnt, errCnts.recrErrCnt, errCnts.unrSyncErrCnt, errCnts.unrcErrCnt );
print(str1);
#endif
What could be the route cause behind these errors?
Is there any workaround?
Show Less
Hi All,
We are using CYUSB3065-BZXC. We forgot to put GPIO48 and GPIO49 on the design for our custom boards. But we do have access to GPIO17 to GPIO45 on custom hardware. Can I add UART on these pins?
Show LessHi, I am looking into the feasibility of using a CYUSB3014 for a project.
The documentation and tutorial videos on youtube show a configuration software, "GPIF II Designer". However, I can't seem to find a download for it. Is it still available?
Weirdly, when I google GPIF II Designer, I get an Infineon webpage - the text description on the page is indeed about GPIF II Designer, but the download link is for GPIF Designer. Maybe the page is broken? Or something went wrong when Cypress was acquired?
The apparently broken webpage:
https://www.infineon.com/cms/en/design-support/tools/configuration/usb-gpif-designer/
I am very interested in using the FX3 platform, so any help would be greatly appreciated!
Show LessIn the note AN75779, this passage caught my attention:
" The USB socket (acting as a consumer socket) uses a different DMA descriptor chain (descriptor chain 3) to read the data out in the correct order..."
Please see the full description in the attached picture.
I have a question, how does DMA descriptor chain 3 determine the order? Are programmers required to design?
Thank you very much for your answer.
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