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USB superspeed peripherals Forum Discussions

Anonymous
Not applicable

I have a peripheral device that uses Cypress CX3 as bridge IC, and we are performing EMC tests for submittal.  We need to know the highest clock frequency used in CX3, since it supports USB3.1 Gen1 at 5Gbps, I assume it has a clock running at 2.5GHz or 5GHz inside the USB3 PHY.  It makes a big difference between 2.5GHz and 5GHz, because FCC standards calls for 5 times the highest frequency used, and not many chambers are capable of 25GHz.

Please let me know the highest clock used inside CX3, so I can plan my test chamber and test limit correctly.

Thank you.

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1 Solution
SudheerG_41
Employee
Employee
5 sign-ins Welcome! 25 comments on KBA

Hi,

Basically the CX3 has the USB SuperSpeed support in addition to CSI.

So, when I looked at FX3 TRM Page-82 shows the Internal PHY has a clock of 500MHz. This is applicable for CX3 part also.

Thank You & Regards,

Sudheer

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3 Replies
SudheerG_41
Employee
Employee
5 sign-ins Welcome! 25 comments on KBA

Hi,

Basically the CX3 has the USB SuperSpeed support in addition to CSI.

So, when I looked at FX3 TRM Page-82 shows the Internal PHY has a clock of 500MHz. This is applicable for CX3 part also.

Thank You & Regards,

Sudheer

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Anonymous
Not applicable

Hi, Sudheer,

That page shows a 500MHz/10bit interface between SERDES and the follow on stage.  What about the clock used inside of the SERDES?  Is that clock 5000MHz or 5GHz?  Or does the SERDES somehow do a phase shift on the 500MHz clock to sample incoming data at 5Gbps?

Thank you.

Hao

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Hi Hao,

It is at 5 GHz.

Thank You & Regards,

Sudheer

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