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USB superspeed peripherals

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I observe a strange behavior of GPIO[51] pin in the following scenario:

PMODE pins set for SPI boot and lppMode is set to CY_U3P_IO_MATRIX_LPP_DEFAULT and GPIO[51] is configured as simple GPIO and set to output logic 1.

In such particular case GPIO[51] output is in high-impedance state instead of expected logic 1. Overriding the pin does not help. I also checked the state of I2S, UART and SPI hardware blocks via appropriate registers -- all these blocks are disabled.

However, if PMODE pins are set for USB boot or I2C boot, same firmware works just fine -- GPIO[51] outputs logic 1. Also if lppMode is set to something other then CY_U3P_IO_MATRIX_LPP_DEFAULT, again GPIO[51] is working as expected now even for SPI boot.

And the most weird thing is that if in addition to GPIO[51] another GPIO -- GPIO[57] -- is also configured as simple GPIO, than GPIO[51] suddenly starts working properly (outputs logic 1) in that bad scenario described above.

It seems like booting from SPI lefts something in IO_MATRIX configuration that prevents GPIO[51] from working as Simple GPIO when lppMode is CY_U3P_IO_MATRIX_LPP_DEFAULT. Like that pin is still reserved for some hardware block. Configuring separate GPIO[57] as Simple GPIO resolves IO_MATRIX problems, which is very strange.


Do you have an explanation for such a weird behavior? It looks like a bug in Cypress firmware library related to SPI boot and CY_U3P_IO_MATRIX_LPP_DEFAULT.

Thank you!



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