Stereo vision using CX3

[AhSa_4793071]

Hi,

I'm thinking about using CX3 with the following sensor module.

https://www.waveshare.com/imx219-83-Stereo-camera.htm

is it possible to use it with CX3 ? For a resolution Ultra HD from two sensors ?

[YashwantK_46 · Accepted solution]

Hello ahsa_4793071​,

In the link you shared for the image sensor, I see the Resolution: 3280 × 2464 (per camera).

The data rate per sensor: 3280 x 2464 x 60 (fps) x 16 (bits/pxl) = 7,758,643,200 b = 7399.21875 Mb = ~7.23Gbps

This is way beyond the USB bandwidth of 2.4Gbps supported by CX3.
Also, there is no mention of the type of interface for the image sensor, whether it is a parallel interface or a MIPI interface, which is necessary to suggest between CX3 and FX3.

CX3 supports interfacing of MIPI interface image sensors whereas FX3 can be used to interface LVDS/ parallel interface image sensors

Can you please let me know the exact resolution and fps you want to use CX3 for?
Also, can you let me know what is the output video format of the sensor?

Regards,

Yashwant

[AhSa_4793071]

The interface of camera is MIPI CSI II.

The desired resolution is

1080 * 60FPS, for dual lane.

Thanks for your support.

[MiDa_1966691]

I have done a few designs with multiple camera’s:

We used a Lattice crosslink or FPGA to the Camera’s and a simple parallel bus to a FX3 or a MIPI interface using a CX3.

Lattice has a EVK platform:

lattice Embedded Vision Processing DVK:

It has two - IMX 214 Camera's - a Crosslink device to FPGA to USB3.0

If you don’t need to do a lot of image processing and just want to send the image to the PC.

You can remove the FPGA and just use the Lattice Crosslink device.

-Mike

[AhSa_4793071]

I'm trying to get depth image, not sure If it should be written on the FPGA or not, as I don't have experience writing that on it.

Is that kit able to do more than 1080b at 90FPS or 60 FPS ?

[YashwantK_46]

Hello AhSa_4793071​,

Since the interface is MIPI CSI II, you can use CX3.

As mentioned in the CX3 datasheet, CX3 supports up to 1 Gbps of data on each CSI lane is supported (total maximum bandwidth should not exceed 2.4 Gbps).

The data rate for 1080p @ 60fps = 1920 x 1080 x 16 x 60 = ~1.85Gbps

The 1.85Gbps data rate is possible to be transferred using CX3, but I believe that the above data rate corresponds to only one camera but CX3 won't be able to support the two camera throughput which would be ~3.7 Gbps ( beyond the 2.4Gbps max bandwidth supported).

Because of this, you would need to use an FPGA that can accept MIPI camera sensors to either combine both the streams and send via the 4 lane interface at < 2.4Gbps throughput or do a high speed switching between both the image sensors and connect the MIPI output from FPGA to CX3 and then decode it using a custom host application.

OR
You would need an FPGA to accept the MIPI camera sensors, combine the stream and give the combined stream as an LVDS or Parallel Output to FX3 which can support a bandwidth of up to 3.2Gpbs and use a custom host application to decode the incoming stream from the system.

Regards,
Yashwant