Problems with dedicated flag in slavefifo read operation

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Anonymous
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I have configured a dedicated flag for socket '0' which tells me the status of availability of buffer in FX3.

   

1. The flag is high even before sending data from fx3 control center

   

2. I have interfaced the fx3 to a xilinx Zynq module I am trying to save the data sent from host-PC to ddr3 RAM. as soon as I start my application in PROCESSOR SYSTEM. The flag goes low

   

How can i tackle this problem.

   

 

   

Regards,

   

Pruthvi Raj

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15 Replies
Anonymous
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Hi Raj,

   

First of all, I am assuming that you are using the Slave FIFO example project that comes as part of SDK.

   

If yes, then CY_U3P_PIB_SOCKET_0 is configured as Producer socket in that example. This thread will be in picture if you are trying to do data transfer from FPGA --> FX3 --> PC.

   

But when you are doing the data transfer from PC --> FX3 --> FPGA then you should be looking for flag which represents the Consumer socket. It is thread 3 in case of this Slave FIFO example. Please monitor the dedicated flag for thread 3.

   

Thanks,

   

sai krishna.

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Anonymous
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 Hello Sai Krishna,

   

I am not using the firmware example and thread 0 is the consumer_pport_socket.

   

and I have made a dedicated thread flag for '0'.

   

Regards,

   

Pruthvi Raj 

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Anonymous
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Hi,

   

Please let me know the settings of that flag in your project.

   

   

Thanks,

   

sai krishna.

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Anonymous
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 Hello Sai Krishna,

   

I saw your previous posts on the same issue and I to was wondering if I may be wrong here.

   

Apart from that will there be no other issue why the flag is low immediatly after starting the application in Zynq??

   

As I am out from my office presently, I can confirm things only by next week..:(

   

Regards,

   

Pruthvi Raj

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Anonymous
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Hii Sai Krishna,

   

As u have said in your previous comment my flag settings are similiar to what you have shown...

   

So it means when the buffer is full my flag is low and when buffer is empty my flag is high.

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Anonymous
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Hiii,

   

The same problem still persists I cant read any data from FX3 as the flag goes low immediatly, after I start my application in arm processor in Zynq.

   

What can be the problem,the flag is configured to the  right pinouts and gpio's.

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Anonymous
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Hii,

   

I have now changed the dedicated thread flag to current thread flag and I have seen to much of fluctuations it is almost like a clock signal with 200 ns pulse duration.

   

What might have gone wrong I dont understand anything from this??

   

Regards,

   

Pruthvi

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Anonymous
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Hi Raj,

   

Can you please share your firmware source project and GPIF II project here.

   

I would like to take a look at it.

   

Thanks,

   

Sai Krishna.

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Anonymous
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Hello Sai Krishna,

   

Please find the attached zip file where u can find the firmware and gpif. I am using cypress sdk 1.2.3

   

Regards,

   

Pruthvi Raj

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Anonymous
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Hello Sai Krishna,

   

Any ideas or did u find any mistake from the firmware I have sent you??

   

 

   

Regards

   

Pruthvi Raj

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Anonymous
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Hello Sai Krishna,

   

Can you atleast tell me if the flag remains high even if the FX3 is not programmed with firmware??

   

Because we have set the flag initial level to low it shouldnt happen right?

   

Regards,

   

Pruthvi

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Anonymous
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Hello guys,

   

 I havent debugged but I never can see the dedicated thread flag go high for slave fifo read operation.

   

Also when I use current dma flag it is completely different scenario . the flag goes high and low all the time almost like a clock very rapidly... donno what's happening

   

 

   

Need help guys

   

Regards,

   

Pruthvi

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Anonymous
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        Hi raj8889. I a newbie with FX3 and I have the same problem plus more wrong thing. Could you pass me the vhdl code to compare with mine? Thanks in advance.   
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Anonymous
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Hi Novato,

   

 

   

Can you please add more details about your problem.

   

Which flag is not working? What is the behavior of the flag? Have you done any changes to the firmware or the GPIF II project provided by Cypress? If yes please mention the changes as well.

   

Also let me know the Buffer size and the count of DMA channels that you are creating in the firmware.

   

 

   

Thanks,
Sai Krishna

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Anonymous
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        Hi, I'm using a custom board. It has connected only 2 flags between fpga and fx3, so I have adapted the example code from AN65974. (I think my board has similar connection between fpga and fx to raj8889, therefore I ask for his code, to compare). At this moment (I think) I have resolved flag issue, but when I try loopback example I always lose the firsts 32 bits. Could you give me some advice? Thanks.   
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