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TaKI_297676
Level 3
Level 3
10 questions asked 25 sign-ins 10 replies posted

Dear Support Members

 

I defined mutichannel dma for stream as below (DMA Size is 16KB...as i think...)

======

#define STREAM_DMA_BUFFERS         6
#define STREAM_DATA_BUF_SIZE      0x3FF0
#define STREAM_PACKET_HEADER_SIZE    16
#define STREAM_PACKET_FOOTER_SIZE    0

dmaMultiConfig.size = STREAM_DATA_BUF_SIZE + STREAM_PACKET_HEADER_SIZE
+ STREAM_PACKET_FOOTER_SIZE;
dmaMultiConfig.count = STREAM_DMA_BUFFERS;
dmaMultiConfig.validSckCount = 2;
dmaMultiConfig.prodSckId[0] = CY_U3P_PIB_SOCKET_0;
dmaMultiConfig.prodSckId[1] = CY_U3P_PIB_SOCKET_1;
dmaMultiConfig.consSckId[0] = CY_U3P_UIB_SOCKET_CONS_2;
 
dmaMultiConfig.dmaMode = CY_U3P_DMA_MODE_BYTE;
dmaMultiConfig.notification = CY_U3P_DMA_CB_CONS_EVENT | CY_U3P_DMA_CB_PROD_EVENT;
dmaMultiConfig.cb = StreamDmaCallback;
dmaMultiConfig.prodHeader = STREAM_PACKET_HEADER_SIZE;
dmaMultiConfig.prodFooter = STREAM_PACKET_FOOTER_SIZE;
dmaMultiConfig.consHeader = 0;
dmaMultiConfig.prodAvailCount = 1;
 
apiRetStatus = CyU3PDmaMultiChannelCreate(&glChHandleStream, CY_U3P_DMA_TYPE_MANUAL_MANY_TO_ONE, &dmaMultiConfig);
======================
And then 1 more dma is defined for control as below
============================
dmaConfig.size = size;
dmaConfig.count = 8;
dmaConfig.prodSckId = CY_U3P_UIB_SOCKET_PROD_1;
dmaConfig.consSckId = CY_U3P_CPU_SOCKET_CONS;
dmaConfig.prodAvailCount = 1;
dmaConfig.prodHeader = 0;
dmaConfig.prodFooter = 0;
dmaConfig.consHeader = 0;
dmaConfig.dmaMode = CY_U3P_DMA_MODE_BYTE;
dmaConfig.notification = CY_U3P_DMA_CB_PROD_EVENT;
dmaConfig.cb = ControlDmaCallback;
status = CyU3PDmaChannelCreate(&glChHandleControlProd, CY_U3P_DMA_TYPE_MANUAL_IN, &dmaConfig);
dmaConfig.prodSckId = CY_U3P_CPU_SOCKET_PROD;
dmaConfig.consSckId = CY_U3P_UIB_SOCKET_CONS_1;
dmaConfig.notification = CY_U3P_DMA_CB_CONS_EVENT;
dmaConfig.cb = NULL;
dmaConfig.prodAvailCount = 0;
status = CyU3PDmaChannelCreate(&glChHandleControlCons, CY_U3P_DMA_TYPE_MANUAL_OUT, &dmaConfig);
=================================================================================
I understand that multichannel dma.count is the number of DMAs per socket, and if set to 6, a total of 12 DMAs are allocated. However, if you count the number of buffers at the time an overrun error occurs, it occurs when the set number, that is, 6, is exceeded.
The calculation of the number of dma buffers is increased when a produce call back occurs in the callback function, and decreased when a consume call back occurs.
 
void StreamDmaCallback(CyU3PDmaMultiChannel *multiChHandle,
CyU3PDmaCbType_t type, CyU3PDmaCBInput_t *input) {
CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
static uint32_t dmaCount = 0;
if (type == CY_U3P_DMA_CB_PROD_EVENT) {
CyU3PDmaBuffer_t dmaBuffer;
status = CyU3PDmaMultiChannelGetBuffer(multiChHandle, &dmaBuffer,
CYU3P_NO_WAIT);
dmaCount++ ;
while (status == CY_U3P_SUCCESS)
{
.....
}
 
} else if (type == CY_U3P_DMA_CB_CONS_EVENT) {
dmaCount--;
glConsCnt++;
.......
}
}

 

Why can't I use all 12 buffers?
Based on the previous questions, I think you should be able to use all 12.

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1 Solution
MallikaK_22
Moderator
Moderator
Moderator
50 likes received 750 replies posted 250 solutions authored

Hi,

Kindly check this KBA: https://community.infineon.com/t5/Knowledge-Base-Articles/DMA-buffer-count-and-size-allocation-in-EZ...

This should help and let me know if you have any further questions.

Regards,

Mallika

View solution in original post

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3 Replies
MallikaK_22
Moderator
Moderator
Moderator
50 likes received 750 replies posted 250 solutions authored

Hi,

Kindly check this KBA: https://community.infineon.com/t5/Knowledge-Base-Articles/DMA-buffer-count-and-size-allocation-in-EZ...

This should help and let me know if you have any further questions.

Regards,

Mallika

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TaKI_297676
Level 3
Level 3
10 questions asked 25 sign-ins 10 replies posted

I already saw the article you recommended.

Our system has CX3 and FX3 with 512KB RAM.

I am not using 2-stage boot area. So I expected 256KB to be available for DMA.

======================================================  (in cyfxtx.c)

 /* 512 KB RAM is available. */

/*
The default application memory map for FX3 firmware is as follows:

Descriptor area Base: 0x40000000 Size: 12 KB
Code area Base: 0x40003000 Size: 180 KB
Data area Base: 0x40030000 Size: 32 KB
Driver heap Base: 0x40038000 Size: 32 KB
Buffer area Base: 0x40040000 Size: 224 KB
2-stage boot area Base: 0x40078000 Size: 32 KB

*/

#define CY_U3P_MEM_HEAP_BASE (0x40038000)
#define CY_U3P_MEM_HEAP_SIZE (0x8000)
#define CY_U3P_SYS_MEM_TOP (0x40080000)

 

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MallikaK_22
Moderator
Moderator
Moderator
50 likes received 750 replies posted 250 solutions authored

Hi,

So it's possible to change the memory map. You can follow this KBA: https://community.infineon.com/t5/Knowledge-Base-Articles/Modifying-the-Default-Memory-Map-in-FX3-CX...

 

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