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USB superspeed peripherals Forum Discussions

Rajesh
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Level 1
First like given 5 sign-ins First question asked

FAQ stated that a) the space between the “P” and “N” signal tracks should be twice the width of the tracks, b) MIPI lane should have 100 ohm impedance. Is it mandatory to follow both rules or can only maintain impedance and discard the twice spacing requirement? 

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AliAsgar
Moderator
Moderator
Moderator
750 replies posted 50 likes received 500 replies posted

Hi Rajesh,

The MIPI lane guidelines mentioned in the AN70707 are taken from the official MIPI CSI2 spec. Some of the issues can occur at specific frequencies, even though they may not be that apparent. We do not recommend avoiding the guidelines mentioned. 

Best Regards,
AliAsgar

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AliAsgar
Moderator
Moderator
Moderator
750 replies posted 50 likes received 500 replies posted

Hi Rajesh,

The MIPI lane guidelines mentioned in the AN70707 are taken from the official MIPI CSI2 spec. Some of the issues can occur at specific frequencies, even though they may not be that apparent. We do not recommend avoiding the guidelines mentioned. 

Best Regards,
AliAsgar

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