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USB superspeed peripherals Forum Discussions

Anonymous
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Hello! I am using the FX3 with a Sony IMX290 image sensor. I am using the sensor’s CMOS parallel output with the XVS and XHS output pins for the line valid and frame valid syncs. I am currently set up for 1080p 30 f/s on a 74.25MHz pixel clock.

My question is that in reading the image sensor data sheet, I realize that along with the detecting the pulses from the XVS and XHS, sync codes must also be read from the data bus to determine when the image sensor data is valid. There are four sync codes that appear consecutively. Furthermore, there seems to be some dummy data before the recording pixels start. This seems in contrast to the On Semi sensors and what is used in the AN75779 app note where the hardware signal pulses provide all the information required for valid data.

Is it possible to modify the GPIF II project to read these sync codes before pushing data out for each frame line? I have read through the forums/GPIF tech manual and it looks like the CMP_DATA action for each state would work. However, as someone else has mentioned on the forum, when you use that action for multiple states, it doesn't allow different values for each state... it is more like a global value that is used for every time you use that action. The suggestion was that you must program the register directly, but there must be enough time for the transition. Is this possible to do with an image sensor operating this fast? Here is a link to that forum post. https://community.cypress.com/thread/16005?q=compare%20data

If I can make a change to the register that holds the CMP_DATA value, do I have to compile the GPIF II project and make those changes in the actual code that is created in the .c that is the output from that project? 

Do you have any examples of a project like this?

Also, I am still unclear how to properly use the Unmask value on the CMP_DATA action. If I am using a 10 bit parallel output and I want to detect 0x3FFh, what does the Unmask Value need to be? My data bus is set up for 16bits on the FX3.

Thanks!

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Hemanth
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Hi Jill,

I noticed that this image sensor has MIPI CSI-2 Interface too. Please verify.

If that is there, then what needs to be verified is: Will the sync patterns come in the MIPI data too? If yes, then that still needs parsing in CX3 (which is not possible)

CX3 just sends the MIPI data to the Host.

In case of parallel output:

Can you please check if there is any pin on the sensor which will get asserted only when valid data starts? (That is after the sync pattern)

Regards,

Hemanth

Hemanth

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KandlaguntaR_36
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Can you provide the timing diagram that shows the XVS and XHS; valid data and sync codes data (similar to Figure 8 in AN75779)?

Would like to understand how the image sensor is putting the data out?

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Anonymous
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Sent in a message to you.

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Hemanth
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Hi,

Four different comparisons (four bytes - 0x3FF, 0x000, 0x000 and 0x200) cannot be made in a single state machine without firmware intervention which requires some delay between the comparisions.

But in your case there is no time available between these comparisons to be made.

Regards,

Hemanth

Hemanth
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Hemanth
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First like given First question asked 750 replies posted

Hi Jill,

I noticed that this image sensor has MIPI CSI-2 Interface too. Please verify.

If that is there, then what needs to be verified is: Will the sync patterns come in the MIPI data too? If yes, then that still needs parsing in CX3 (which is not possible)

CX3 just sends the MIPI data to the Host.

In case of parallel output:

Can you please check if there is any pin on the sensor which will get asserted only when valid data starts? (That is after the sync pattern)

Regards,

Hemanth

Hemanth
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Anonymous
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Thanks for responding. Yes, there is also a MIPI CSI-2 and LVDS interface. However, I am currently using the parallel Interface in order to be compatible with a previous system. In a separate app note, I did find there are two pins that can be used instead of the 2 main XVS and XHS pins in something called a DCK Synchronous mode. The issue is that the app note doesn’t state how to enable these 2 pins to be used in this manner. So, I am awaiting a response from the Sony engineers about how to do this. I am unsure how long it will take to get a response, so in the mean time I have become much more familiar with the GPIF designer and code.

My next plan for the current situation is to try to use a CPU interrupt to jump out of the state machine at the start of a new line and use the GPIFReadDataWords function to detect the sync codes and implement a code switch/case statement. Once the sync codes have been found, I can jump back into the state machine and push the data as needed with a counter. Does this seem plausible?

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Hemanth
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Hi Jill,

I understand the method you intend to try. But I don't think you can jump back fast enough to the state machine immediately after sync code detection. That has to be tried to check whether you loose some image data immediately after sync code detection.

Regards,

Hemanth

Hemanth
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Anonymous
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Hemanth,

Yeah, this is something I will look into. Thanks for the response.

Jill

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