How to control XRESET and XHUTDOWN in 2-stage bootloader?

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dawa_2529456
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Level 4
5 sign-ins 5 solutions authored First solution authored

Dear Sir,

I want to call use the pins of XRESET & XSHUTDOWN of CX3 mipi blcok as GPIO in 2-stage boot loader , we can use CyU3PMipicsiInit(), but how to do this call in 2-stage bootloader ?

Thanks.

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Instead of using 2nd stage bootloader, have you tried using a single firmware which includes both the sesnor register settings and loading the setting based on the chip ID read while running?

It is clear that this will increase the code size.

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KandlaguntaR_36
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25 solutions authored 10 solutions authored 5 solutions authored

In order to use XRESET and XSHUTDOWN, you must initialize the MIPI interface using CyU3PMipicsiInit API.

Then use CyU3PMipicsiSetSensorControl() API to drive 1 to XRESET and XSHUTDOWN signals.

Please refer section 5.25.6.6 of the FX3APIGUIDE.pdf (attached for reference).

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Dear Sir,

Those MIPI API can be called in 2-stage boot loader , which is a bare or non-rtos syetem?

I will try it.

Thanks.

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Dear Sir,

I add #include "cyu3mipicsi.h" in main.c file, but compile error, maybe makefile need updating.

Can you give me some advice?

Thanks!

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Please share the report in the Console Tab to know what are the errors?

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Dear Sir,

Because default  include path or linking libs are different between a bare system and RTOS based UVC project, so all mipi API cannot be used in 2-stage bootloader.

in fact , I enable I2C code and test it, it is working, if we can access CX3 register to provide power and reference clock to mipi block , XRESET and XSHUTDOWN will be easier to set by I2C operation.

The following is console outputs,  I also attached the project source code, BOLD sections are MIPI related.

10:18:43 **** Incremental Build of configuration Release for project Fx3BootAppGcc-wdc ****

cs-make all

'Building file: ../main.c'

'Invoking: Cross ARM C Compiler'

arm-none-eabi-gcc -mcpu=arm926ej-s -marm -mthumb-interwork -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -Wall  -g -I"C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/boot_lib/1_3_3/include" -std=gnu11 -MMD -MP -MF"main.d" -MT"main.o" -c -o "main.o" "../main.c"

../main.c:27:25: fatal error: cyu3mipicsi.h: No such file or directory

#include "cyu3mipicsi.h"

                         ^

compilation terminated.

cs-make: *** [main.o] Error 1

10:18:44 Build Finished (took 532ms)

/////////////////////////////////////////

/*

## Cypress FX3 Boot Firmware Example Source file (main.c)

## ===========================

##

##  Copyright Cypress Semiconductor Corporation, 2011-2012,

##  All Rights Reserved

##  UNPUBLISHED, LICENSED SOFTWARE.

##

##  CONFIDENTIAL AND PROPRIETARY INFORMATION

##  WHICH IS THE PROPERTY OF CYPRESS.

##

##  Use of this file is governed

##  by the license agreement included in the file

##

##     <install>/license/license.txt

##

##  where <install> is the Cypress software

##  installation root directory path.

##

## ===========================

*/

#include "cyfx3usb.h"

#include "cyfx3device.h"

#include "cyfx3utils.h"

#include "cyfx3gpio.h"

#include "cyu3mipicsi.h"

/* GPIO to be used for testing. */

#define FX3_GPIO_TEST_OUT               (50)

#define FX3_GPIO_TO_LOFLAG(gpio)        (1 << (gpio))

#define FX3_GPIO_TO_HIFLAG(gpio)        (1 << ((gpio) - 32))

/* Enable this for booting off the USB */

#define USB_BOOT

#ifdef USB_BOOT

extern void

myUsbBoot (

        void);

extern uint8_t glCheckForDisconnect;

extern uint8_t glInCompliance;

#endif

/* Enable this for booting off the SPI Flash */

/* #define SPI_BOOT */

#ifdef SPI_BOOT

extern CyFx3BootErrorCode_t initSpi (void);

extern CyBool_t bootFromSpi (void);

#endif

/* Enable this for booting off the I2C EEPROM. */

/* #define I2C_BOOT */

#ifdef I2C_BOOT

extern CyBool_t

MyI2cBoot (

        void);

#endif

/****************************************************************************

* main:

****************************************************************************/

int

main (

        void)

{

    CyFx3BootErrorCode_t status;

    CyFx3BootIoMatrixConfig_t  ioCfg;

    CyFx3BootGpioSimpleConfig_t gpioCfg;

    /* HW and SW initialization code  */

    CyFx3BootDeviceInit (CyTrue);

    ioCfg.isDQ32Bit = CyFalse;

    ioCfg.useUart   = CyTrue;

    ioCfg.useI2C    = CyTrue;

    ioCfg.useI2S    = CyFalse;

    ioCfg.useSpi    = CyTrue;

    ioCfg.gpioSimpleEn[0] = 0;

    ioCfg.gpioSimpleEn[1] = 0;

    status = CyFx3BootDeviceConfigureIOMatrix (&ioCfg);

    if (status != CY_FX3_BOOT_SUCCESS)

    {

        CyFx3BootDeviceReset ();

        return status;

    }

    // init UART

    testUartRegMode();

    //I2cInit();

    CyU3PMipicsiInitializeI2c(CY_U3P_MIPICSI_I2C_400KHZ);

    CyU3PMipicsiInitializePIB();

    CyU3PMipicsiInit();

#ifdef SPI_BOOT

    /* Enable this for booting off the SPI */

    status = initSpi ();

    if(status != CY_FX3_BOOT_SUCCESS)

    {

        return status;

    }

    bootFromSpi ();

#endif  

#ifdef I2C_BOOT

    /* Try booting from I2C and fall back to USB if it fails. */

    MyI2cBoot ();

#endif

    /* Initialize the GPIO module. Force GPIO[50] low. Then request to retain GPIO state across boot. */

    CyFx3BootGpioOverride (FX3_GPIO_TEST_OUT);

    CyFx3BootGpioInit ();

    gpioCfg.outValue    = CyFalse;

    gpioCfg.driveLowEn  = CyTrue;

    gpioCfg.driveHighEn = CyTrue;

    gpioCfg.inputEn     = CyFalse;

    gpioCfg.intrMode    = CY_FX3_BOOT_GPIO_NO_INTR;

    status = CyFx3BootGpioSetSimpleConfig (FX3_GPIO_TEST_OUT, &gpioCfg);

    if (status != CY_FX3_BOOT_SUCCESS)

        return status;

    CyFx3BootRetainGpioState ();

#ifdef USB_BOOT

    /* Enable this for booting off the USB */

    myUsbBoot ();

#endif

    while (1)

    {

#ifdef USB_BOOT

        /* Enable this piece of code when using the USB module.

         * Call the new wrapper function which handles all state changes as required.

         */

        CyFx3BootUsbHandleEvents ();

#endif

        /* If there are any other tasks that this application needs to perform, they can be called from here. */

    }

    return 0;

}

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2nd-stage boot loader does not include RTOS in it. It is light code.

You need to link the libraries in 2-stage bootloader.

Refer CX3 example firmware project settings and do the same here.

Please specify why you are trying to use MIPI in second stage bootloader.

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Dear Sir,

In  fact, My CX3 camera can connect different image sensor head with specific firmware individually, it is very difficult for me to drive every image sensor head by a common CX3 firmware, I have to download a dedicated CX3 firmware when a specific image head is connected.

So, I have to use 2-stage boot loader to download its  customized firmware while unknown image head attached dynamically. for example, my CX3 main board support:

1: image head A:  OV5640 from OVT

2: image head B:AS0260.from Onsemi

The process will be :

action 1: 2-stage boot loader will boot from external flash at first, it will use XRESET and XSHUTDOWN to power up image head, and then send i2c cmd to probe which sensor is connected by reading sensor's CHIP ID

action 2: According to CHIP ID , I will fill a defined PID in device descriptor string, ex, if OV5640 is detected, the PID will be 00 F0, if as0260 is detected, PID will be 00 B0

action 3: if HOST app read PID is 00 F0, it will send ov5640 cx3 imgto CX3 internal SRAM, if PID is 00 b0, the host app will send as0260 CX3 img to CX3 interal SRAM, after re-enumeration, an UVC device will be found.

So, in 2-stage boot loader, I have to use XRESET and XSHUTDOWN to power up the camera head. and then read image sensor CHIP ID by i2c bus. I had enabled i2c in 2-stage boot loader and it works well.

I also open another topic on 2-stage boot loader in community days ago, I found 2-stage boot loader can not down load img to CX3 internal SRAM 100 percent successfully.  some time programming successful very quickly, sometimes programming successful with long period, maybe several seconds, and most often, programming fails.  so, it is another trouble I met in this week.

Can you give more suggestion ?

Thanks.

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Instead of using 2nd stage bootloader, have you tried using a single firmware which includes both the sesnor register settings and loading the setting based on the chip ID read while running?

It is clear that this will increase the code size.

0 Likes