How to connect pixel data output lines from image sensor to FX3 DQ lines? Should I use a level shifter?

[zhangshun]

Hello,

I am trying to design a camera (using sensor from Onsemi AR0134 ) shield board , that should be attached to the develop board CYUSB3KIT-003 . The interface is simply between image sensor and FX3, no ISP or FPGA inbetween.

The output signals from the image sensor should be parallel. Since I am going to supply the VDD_IO of the sensor using 2.8V, I am wondering whether I should place a level shifter IC (2.8V <-> 3.3V) on my shield board, so that the DQ pins from my shield are board 3.3V compatible. 

Thanks,

Zhangshun

[AliAsgar]

Hi Zhanshun,

If the voltage of your output pins is 2.8V, a bus level shifter needs to be added to make it 3.3V compatible for CYUSB3KIT-003.

However, if the voltage of your output pins is 1.8V, there is no need of level shifter, opening the J2 jumper on the CYUSB3KIT-003 would provide 1.8V to the VIO1 voltage domain.

Best Regards,
AliAsgar

[zhangshun]

Hi AliAsgar,

thanks for your answer! I have no doubt on the 1.8V operation.

I looked into the application note AN75779 and in Section 6.2, where the hardware setup are shown. I have seen that the image sensor board operates at 2.8V IO, and thus the jumper J2 on the CYUSB3KIT-003 should be closed. This makes sense, but the schematic of CYUSB3KIT-003 shows that closing J2 will set VIO1_3 as 3.3V, which is the same as you said.

I checked the adapter board CYUSB3ACC-004 and MT9M114 image sensor board, there are no level shifters for the data lines. 

My questions are:

1. Why in AN75779, it shows "VDDIO voltage selection (2.8V)" when closing J2. Is this a typo or not?
2. If closing J2 to select VIO1_3 on FX3 as 2.8V, I think I need to replace the feedback resistors on the regulator U7. Correct?
3. If nothing is changed on any boards, then VIO1_3 on FX3 is 3.3V. In this way, the image sensor outputs (2.8V) are directly communicated with the DQ lines on FX3 (3.3V) without level shifter. Could you help to  confirm?

Thanks for your help!

Best

Zhangshun

[AliAsgar · Accepted solution]

Hi Zhangshun,

The VDDIO voltage of FX3 for the superspeed explorer kit:
J2 closed - 3.3V
J2 open - 1.8V.

I am sorry for my comments in the first post. I had made a mistake. There is no need of a level shifter for interfacing 2.8V logic signals to 3.3V logic signals.
Please refer to DC specification under section 17.3. The min value of Vih is 0.625*Vcc = 0.625*3.3V = 2.06V. As 2.8V is well within the range, the logic levels for 2.8V signals should be compatible with logic levels of 3.3V.

Best Regards,
AliAsgar

[zhangshun]

Hi AliAsgar,

thanks for your answer! You are correct, no level shifter is required in this case. 

Best

Zhangshun