How many CLKs should be kept between writing and reading at FPGA side?

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yxx0803
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There was an application in my project.Fpga transferred an ACK frame to the host when fpga received a CMD frame from the host.The length of ACK and CMD  is 32B.The GPIF II interface is a half_duplex interface, so how many CLKs should be kept at least bewteen writing and reading?I found that if set different CLKs between  reading and writing,it  would  go wrong.FPGA could recevie CMD frame correctly;I can capture the  time sequence of  writing,it is right;But  the  ACK frame received by xferdata funtion lost the first 4B,and the last 4B is 00000000;If i transferred CMD and recevied ACK by control center,it shows that the fx3 buffer only have 31B data.Could you give me some advice?thanks a lot.

Some based settings in my design:

datawidth:32bit

fclk:100MHz

watervalue: 6

buffer size :16KB

buffer count:2

 

Best Regards,
Jack chen
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1 Solution
AliAsgar
Moderator
Moderator
Moderator
1000 replies posted 250 solutions authored 750 replies posted

Hello,

There is no CLK defined between the reading and writing at FPGA side. It is recommended to read/write based on the flag conditions.

Kindly check the buffers contents of read operation on the firmware side.

Best Regards,
AliAsgar

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4 Replies
AliAsgar
Moderator
Moderator
Moderator
1000 replies posted 250 solutions authored 750 replies posted

Hello,

There is no CLK defined between the reading and writing at FPGA side. It is recommended to read/write based on the flag conditions.

Kindly check the buffers contents of read operation on the firmware side.

Best Regards,
AliAsgar

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yxx0803
Level 3
Level 3
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Thanks for your  reply.

Could you provide some resource to learn Firmware.In fact, i only know that the data path in the Firmware.

Best Regards,
Jack chen
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AliAsgar
Moderator
Moderator
Moderator
1000 replies posted 250 solutions authored 750 replies posted

Hi Jack Chen,

P to U channel must be made as a MANUAL channel, store and print the buffers which are received using the getBuffer API. 
Kindly look into USBBulkLoopManual firmware project for implementation.

Best Regards,
AliAsgar

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yxx0803
Level 3
Level 3
50 sign-ins 25 replies posted 25 sign-ins

Hi AliAsgar,

OK!Thanks for your help.

Best Regards,
Jack chen
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