GPIF action and dma setting

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Sylvia
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Hi, 

I have study the document about GPIF but I am still not sure about the action LD_CTRL_COUNT. I have check the option "reload counter on reaching limit". I know the value will be set to zero while reaching limit. I want to ask that will it be set to zero while reaching the "IMG_DATA" state? 

In my condition, the video data(HREF) is sometimes not the same size. It may be two or three HREF to merge to a 4KB data that reaching counter limit. Can the state machine below receive a full 4KB data and push to UVC player?

One more question, I have try to change the dma channel config from BYTE mode to BUFFER mode. We discovered that while dma full, the time that dma return to empty is longer than use BYTE mode. I set dmaMode = CY_U3P_DMA_MODE_BUFFER and size = 1. Is that ok? Because the dma get ready time too long  may cause other side effect to our FPGA. I cannot change my setting to BUFFER mode.

Any response would be greatly appreciated.

Best Regards,
Sylvia

statemachine.PNG

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Rashi_Vatsa
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5 likes given 500 solutions authored 1000 replies posted

Hi,

Sorry, for the confusion. I meant " If you want to send 4KB of data when the HREF is not asserted for 1023 cycles then you can make transition "IMG_PARTIAL" to "IMG_TH0" with transition equation as "HREF". This will resume the CTRL_COUNT from the last count number till it reaches 1023."

Please let me know what is being done when INTR_CPU is triggered.

The DMA mode is used when the CyU3PDmaChannelSetXfer / CyU3PDmaMultiChannelSetXfer is called with second parameter as  finite  number i.e. for the cases when you need to stop the transfers after certain bytes (CY_U3P_DMA_MODE_BYTE)/buffer (CY_U3P_DMA_MODE_BUFFER) are transferred and do some other handling after certain no. of  buffers / bytes are produced or consumed

Please let me know if any queries on this

 

Regards,
Rashi

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Rashi_Vatsa
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Hello,

LD_CTRL_COUNT will initialize/ load the counter. As seen in the snippet, the CTRL Counter is initialized to value 0 and will count till 1023 when the "IMG_TH0" state is running. 

When "IMG_DATA" is entered, CTRL counter will be loaded with 0 value

In my condition, the video data(HREF) is sometimes not the same size. It may be two or three HREF to merge to a 4KB data that reaching counter limit. Can the state machine below receive a full 4KB data and push to UVC player?

>> As per the GPIF design, I understand that <= 1KB of data is being read every time and from the description I understand that you want to send 4KB of data together. If yes,  please let us know the DMA buffer size being used

 We discovered that while dma full, the time that dma return to empty is longer than use BYTE mode. I set dmaMode = CY_U3P_DMA_MODE_BUFFER and size = 1. Is that ok?

>> Please let me know the reason to used CY_U3P_DMA_MODE_BUFFER and why do you used DMA Buffer size =1. DMA Buffer size  will be considered as no. of bytes. CY_U3P_DMA_MODE_BUFFER should be used when the
data size is variable but there should be finite handling after N buffers.

Regards,
Rashi
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Hello Rashi,

Thank you for your reply!

For the GPIF design, the data bus width is 32 bit and the DMA buffer size is 4096.

We try to use CY_U3P_DMA_MODE_BUFFER because each HREF  may be different size. I am not sure is it better to use CY_U3P_DMA_MODE_BUFFER? I don't know how to set DMA buffer size with CY_U3P_DMA_MODE_BUFFER. I tried some settings and it only works with DMA Buffer size =1. If I set DMA Buffer size more than 1, I couldn't see any video from the UVC player.

Best Regards,
Sylvia

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Rashi_Vatsa
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Hi,

Even if you are HREF of a different size you can use CY_U3P_DMA_MODE_BYTE when the transfer size  (set using CyU3PDmaChannelSetXfer/CyU3PDmaMultiChannelSetXfer ) is infinite.

If you are using CY_U3P_DMA_MODE_BYTE and DMA buffer size of 4096 bytes with 32 bits GPIF bus width, the state machine will receive 4KB of data if HREF  is asserted for 1023 clock cycles. If you want to send 4KB of data when the HREF is not asserted for 1023 cycles then you can make transition "IMG_WAIT" to "IMG_TH0" with transition equation as "HREF". This will resume the CTRL_COUNT from the last count number till it reaches 1023.

Regards,
Rashi
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Hi Rashi,

Do you mean: make transition "IMG_PARTIAL" to "IMG_TH0" with transition equation as "HREF"? Because "IMG_WAIT" state already meets the CTRL_CNT_HIT and "IMG_PARTIAL" means not CTRL_CNT_HIT. I am sorry my picture is not very clear so I want to confirm it.

Besides, I would like to know do you have any example about CY_U3P_DMA_MODE_BUFFER? As you mentioned, it is suitable for data size is variable. How to set dma buffer size with this condition?

Best Regards,
Sylvia

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Rashi_Vatsa
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Hi,

Sorry, for the confusion. I meant " If you want to send 4KB of data when the HREF is not asserted for 1023 cycles then you can make transition "IMG_PARTIAL" to "IMG_TH0" with transition equation as "HREF". This will resume the CTRL_COUNT from the last count number till it reaches 1023."

Please let me know what is being done when INTR_CPU is triggered.

The DMA mode is used when the CyU3PDmaChannelSetXfer / CyU3PDmaMultiChannelSetXfer is called with second parameter as  finite  number i.e. for the cases when you need to stop the transfers after certain bytes (CY_U3P_DMA_MODE_BYTE)/buffer (CY_U3P_DMA_MODE_BUFFER) are transferred and do some other handling after certain no. of  buffers / bytes are produced or consumed

Please let me know if any queries on this

 

Regards,
Rashi
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Hi Rashi,

I understand. Thank you!

When INTR_CPU is triggered, it do nothing. The INTR_CPU in "IMG_PARTIAL" used to do CyU3PDmaChannelSetWrapUp for the last href of a frame. Now we move it to the INTR_CPU in "STATE_WAIT_VSYNC".

Best Regards,
Sylvia

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