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Hi,
I use FX3 device. I have a project that receive video and audio ok(UVC/UAC protocol).
I use another thread to receive some data from FPGA. The data is partial packets that not fit the counter limit value in the state machine, so I use INTR_CPU to call CyU3PDmaChannelSetWrapUp function. But I didn't receive partial packets in the CY_U3P_DMA_CB_PROD_EVENT. Is there anything wrong of my flow?
Any response would be greatly appreciated. 😊
Solved! Go to Solution.
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Hi Jayakrishna
Thank you for your reply!!
I am sorry I didn't give you a response.
Because of the issue, my colleague modify the packets to fit the counter limit. My problem is solved. I am sorry I didn't backup my code so I can't share the complete project of this question right now.
Best Regards,
Sylvia
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Hello,
Can you please share the complete project (including GPIF II project) along with the UART debug logs for us to check?
Jayakrishna
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Hi Jayakrishna
Thank you for your reply!!
I am sorry I didn't give you a response.
Because of the issue, my colleague modify the packets to fit the counter limit. My problem is solved. I am sorry I didn't backup my code so I can't share the complete project of this question right now.
Best Regards,
Sylvia
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Hi Sylvia,
Thank you for the update. We are glad to hear that the issue is resolved!
Jayakrishna