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Hello
"AN65974.zip"-> "FX3 Firmware"-> "Slave Fifo Sync"
→ There is the following description on line 892 of "cyfx slfifosync"
io_cfg.gpioSimpleEn [0] = 0;
io_cfg.gpioSimpleEn [1] = 0x08000000; / * GPIO 59 * /
io_cfg.gpioComplexEn [0] = 0;
io_cfg.gpioComplexEn [1] = 0;
Q1)
What will happen to the terminal state when all gpioSimpleEn are set to 0 (disabled)?
Q2-1) I think that the GPIO_SIMPLE register setting described on P.590 of FX3 TRM corresponds to the terminal setting in this case. Is this correct? if so, would like to know the terminal status and necessary terminal processing in that case.
Q2-2) I think that DRIVE_HI_EN: 0 is a tri-state output if the initial value of the register. Is this correct?
Q2-3) Is it okay if external terminal processing is not required in the case of tri-state?
Please answer each question mentioned above?
Best Regards
Arai
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USB Superspeed Peripherals
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Edited!
Hello, Arai-san
Q1. What will happen to the terminal state when all gpioSimpleEn are set to 0 (disabled)?
>>In the bootloader mode, the default state of GPIO corresponding to different boot modes is already documented in section 11 of the following application note:
https://www.cypress.com/file/201991/download
When the application firmware starts running, the state of the GPIOs will be tri-state until they are configured. When pins of gpioSimpleEn are set to 0, and
are not reconfigured, the state of GPIOs is tristate.
Q2.1
>>As you might have seen in pg 590 of FX3 TRM application note, GPIO_SIMPLE register is used to configure each pin.
INPUT_ EN used to enable the input stage, the value can be read from IN_VALUE
DRIVE_HI_EN output driver enable when output is 1
DRIVE_LOW_EN output driver enable when output is 0
IN_VALUE Measuring input at the pin
OUT_VALUE Driving output to the pin.
Q2.2
>>When DRIVE_HI_EN : 0, the output driver responsible for driving the GPIO pin HIGH is tristated, not the port.
So if port has to be tristated, both DRIVE_HIGH_EN and DRIVE_LOW_EN should be made 0.
The initial output value can be determined by the OUT_VALUE bit in the GPIO_SIMPLE register.
Q2.3
>>if PU or PD is used, make sure the state of the pin does not go to the high impedance state in any mode of operation
Thanks and Regards,
AliAsgar
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Hello Arai-San,
Please let us know what exactly you meant by "terminal status" and "terminal processing". By "terminal state", did you mean the state of the GPIO? Please clarify this so that we can guide you better.
Also, can you please elaborate Q2.2 for us to understand it better?
Jayakrishna
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Hello Jayakrishna san
Thank you for your reply.
About "terminal status", we wants to know the status of Port. The Q2-2) questions apply, and the Q2-3) question apply to "terminal processing".
I will explain Q2-2 more details below>
They are assuming that the initial value of the register is assumed to be DRIVE_HI_EN = 0, but is it correct assuming? If so, is it ok to think that the port status is a tri-state output happens to the terminal state when the state of gpioSimpleEn is changed (ex. All 0).
I would like to know more about the above related to the GPIO_SIMPLE register.
Best Regards
Arai
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Hello Jayakrishna san
About "terminal status", we wants to know the status of Port. The Q2-2) questions apply, and the Q2-3) question apply to "terminal processing".
I will explain Q2-2 more details below>
They are assuming that the initial value of the register is assumed to be DRIVE_HI_EN = 0, but is it correct assuming? If so, is it ok to think that the port status is a tri-state output ?
Best Regards
Arai
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Edited!
Hello, Arai-san
Q1. What will happen to the terminal state when all gpioSimpleEn are set to 0 (disabled)?
>>In the bootloader mode, the default state of GPIO corresponding to different boot modes is already documented in section 11 of the following application note:
https://www.cypress.com/file/201991/download
When the application firmware starts running, the state of the GPIOs will be tri-state until they are configured. When pins of gpioSimpleEn are set to 0, and
are not reconfigured, the state of GPIOs is tristate.
Q2.1
>>As you might have seen in pg 590 of FX3 TRM application note, GPIO_SIMPLE register is used to configure each pin.
INPUT_ EN used to enable the input stage, the value can be read from IN_VALUE
DRIVE_HI_EN output driver enable when output is 1
DRIVE_LOW_EN output driver enable when output is 0
IN_VALUE Measuring input at the pin
OUT_VALUE Driving output to the pin.
Q2.2
>>When DRIVE_HI_EN : 0, the output driver responsible for driving the GPIO pin HIGH is tristated, not the port.
So if port has to be tristated, both DRIVE_HIGH_EN and DRIVE_LOW_EN should be made 0.
The initial output value can be determined by the OUT_VALUE bit in the GPIO_SIMPLE register.
Q2.3
>>if PU or PD is used, make sure the state of the pin does not go to the high impedance state in any mode of operation
Thanks and Regards,
AliAsgar
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Hello Arai-san,
Could you specify the type of bus is being used?
Is it a GPIF data bus or a normal GPIO driven by firmware? and if it is a GPIO, is it used as input or output?
Best Regards,
AliAsgar