FX3 as a Modified Master FIFO not appearing in control center

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Camilo4600
Level 1
Level 1
First question asked Welcome!

Hi,

I have been able to set up the Master FIFO example like in the AN87216 app note after modifying the usb descriptors. This solves my bulk transfer needs.

However, I want to be able to pass and read short control signals to a FPGA. What would be the best way to do this?

I believe the example code only uses two of the 4 threads you can have active. So, I made a project similar to the example but with two more endpoints to use as message in and out, without modifying the state machine yet.  I am able to see the 4 endpoints in the control center. But when I try to test if the original endpoint channels work, I am able to transfer data out, but my data in transfer times out (error 997). Any idea on why this is happening.

Please email me and I will provide my current firmware files.

Regards,

Camilo

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1 Solution
Rashi_Vatsa
Moderator
Moderator
Moderator
5 likes given 500 solutions authored 1000 replies posted

Hello,

Please confirm other than the USB descriptors the endpoint configuration is also added in the firmware and the associated DMA channels are created.  If the endpoint is not enabled/configured and the DMA channel is not created/active then error 997 can be seen

Edit:

Or if the DMA channel is created between PIB and /UIB block. Please check if the GPIF  threads are mapped to correct socket using CyU3PGpifSocketConfigure 

Is the error 997 seen on the very first transfer? If yes, please let me know the no. of bytes sent by host and the DMA buffer size used in the firmware.

Regards,
Rashi

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1 Reply
Rashi_Vatsa
Moderator
Moderator
Moderator
5 likes given 500 solutions authored 1000 replies posted

Hello,

Please confirm other than the USB descriptors the endpoint configuration is also added in the firmware and the associated DMA channels are created.  If the endpoint is not enabled/configured and the DMA channel is not created/active then error 997 can be seen

Edit:

Or if the DMA channel is created between PIB and /UIB block. Please check if the GPIF  threads are mapped to correct socket using CyU3PGpifSocketConfigure 

Is the error 997 seen on the very first transfer? If yes, please let me know the no. of bytes sent by host and the DMA buffer size used in the firmware.

Regards,
Rashi
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