Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

USB superspeed peripherals

LeGa_3963206
Level 4
50 replies posted 25 replies posted 10 replies posted
Level 4

Hi all,

I have FX3 firmware that combines AN75779 (modified to receive 32-bit GPIF data) and USB-to-serial. I'm using SuperSpeedKit connected to Zeadboard which sends 120fps 800x480 test pattern. I made all required changes in descriptors and both parts seems to work well except that UVC stream stucks after several seconds of video capture.

By "stucks" I mean that:

1) threads stop running so that I don't see "UVC: Completed ..."  message anymore

2) If I use on-board debugger, debug session also stops responding at all

3) Capture software (Virtualdub/VLC) stop responding as no USB request are processed

Couple additional notes:

1) GPIF SM seems to continue to work because I toggle GPIO from GPIF callback and I can see it in scope.

2) ARM error handlers are not called (put there GPIO toggle also) so it's not CPU issue or memory leak

3) Suspend event not issued for no reason. I do LPM disable on UVC start and enable on UVC stop and return true in LPM CB exactly as in AN75779

Will greatly appreciate for any help

0 Likes
1 Solution
LeGa_3963206
Level 4
50 replies posted 25 replies posted 10 replies posted
Level 4

Hi Hemanth,

Thanks for patch. Now image is not corrupted although at least 2 frames were lost

Here is the output:

               ...

Frames done 49677. Limit reached 0 times

Frames done 49795. Limit reached 0 times

Frames done 49913. Limit reached 0 times

Frames done 50031. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50132 ========

Frames done 50132. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50135 ========

Frames done 50135. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50135 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) ad 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Evs done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

Frames done 50253. Limit reached 0 times

Frames done 50371. Limit reached 0 times

Frames done 50489. Limit reached 0 times

Frames done 50607. Limit reached 0 times

...

Best regards,

Leonid

View solution in original post

0 Likes
46 Replies
Hemanth
Moderator
Moderator First like given First question asked 750 replies posted
Moderator

Hi Leonid,

Can you please try the attached firmware?

Regards,

Hemanth

Hemanth
0 Likes
LeGa_3963206
Level 4
50 replies posted 25 replies posted 10 replies posted
Level 4

Hi Hemanth,

Now it stops by itself:

Frames done 50974. Limit reached 0 times

Frames done 51092. Limit reached 0 times

Frames done 51210. Limit reached 0 times

Frames done 51328. Limit reached 0 times

Frames done 51446. Limit reached 0 times

Frames done 51564. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (0) after frame 51658 ========

*** CyFxUVCApplnStop ***

Total 51658 frames

Best regards,

Leonid

0 Likes
Hemanth
Moderator
Moderator First like given First question asked 750 replies posted
Moderator

Hi Leonid,

Please try the updated project.

Regards,

Hemanth

Hemanth
0 Likes
LeGa_3963206
Level 4
50 replies posted 25 replies posted 10 replies posted
Level 4

Hi Hemanth,

Thanks for patch. Now image is not corrupted although at least 2 frames were lost

Here is the output:

               ...

Frames done 49677. Limit reached 0 times

Frames done 49795. Limit reached 0 times

Frames done 49913. Limit reached 0 times

Frames done 50031. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50132 ========

Frames done 50132. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50135 ========

Frames done 50135. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50135 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) ad 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Evs done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

======== DMA Reset Event: Commit buffer failure (47) after frame 50136 ========

Frames done 50136. Limit reached 0 times

Frames done 50253. Limit reached 0 times

Frames done 50371. Limit reached 0 times

Frames done 50489. Limit reached 0 times

Frames done 50607. Limit reached 0 times

...

Best regards,

Leonid

0 Likes
Hemanth
Moderator
Moderator First like given First question asked 750 replies posted
Moderator

Hi Leonid,

Yes. Loss of few frames while handling the commit buffer failure is unavoidable.

Regards,

Hemanth

Hemanth
0 Likes
LeGa_3963206
Level 4
50 replies posted 25 replies posted 10 replies posted
Level 4

Hi Hemanth,

Frame loss and on 30 fps for such low resolution as 800x482 must be considered as major issue for Cypress.

Meanwhile I'm thinking about some workaround for this issue. So far my idea is to use auto DMA instead of manual. To do so I need to provide UVC header in hardware for each buffer (16368 bytes).

If you think it's feasible, could you please mention required steps I need to do in order to switch to auto DMA?

Anyway, I would like to arrange a real time discussion (phone/skype/zoom/teams/ etc..) with you or your colleagues about this issue.

Best regards,

Leonid

0 Likes
Hemanth
Moderator
Moderator First like given First question asked 750 replies posted
Moderator

During streaming, if there is enough delay from the Host in taking data from FX3, then there can be a case where DMA buffers allocated to video channel are overflowed with the frame data. In such scenarios flow control can be tried on the GPIF interface - so that FPGA holds the data during this delay. If the delay is large enough such that FPGA also runs out of memory to store the data, then few frames will be lost.

Hemanth
0 Likes