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USB superspeed peripherals Forum Discussions

ZhBo_4667106
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Hello,

I setup fx3 superspeed kit with FPGA board to test streamOUT example provided. Streamer and loopback functions well. I can transmit data and receive back. I am trying to transmit 302700 bytes of data or 302700/4=76800 counts of 32 bits. It seems to stop at counter 3072. Counter goes from 76800 to 0 (76799 to 0 to be exact). I am using 32 bits width bus. So each count is 32 bits. So 294912 bytes of data seems to be transmitted just normal, until it stops abnormally. Is there any maximum size limit on Control Center software? 

fx3transferquestion.png

middlecapture.png

It has a burst size of 4096*4=16384 bytes per transfer. Since 76800-72704 = 4096 and data stops and starts again. It seems to work just fine, between bursts, until it hits 3072 count, where FX3 control center side seems to do nothing. 

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AliAsgar
Moderator
Moderator 750 replies posted 50 likes received 500 replies posted
Moderator

Hi,

If streamer and bulkloop examples are working fine with the Cyclone V starter boards, I dont think there would be any changes to be made based on the FPGA.

In the Control Center software could you try sending a Zero length packet after sending 307200 bytes and let us know if the data is sent out properly?

Best Regards,
AliAsgar

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Rashi_Vatsa
Moderator
Moderator 5 likes given 500 solutions authored 1000 replies posted
Moderator

Hello,

Please let us know if you have made any modifications to the firmware shared with AN65974.

In default firmware, if STREAM_IN_OUT is enabled, the burst length will be 16. Also, confirm if the FPGA code is similar to the one shared with AN65974. 

Regards,
Rashi
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ZhBo_4667106
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I attached zip file with .vhd source code. I made a little change to code, so that it has a counter and valid data flag. FX3 firmware hasn't been touched. 

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ZhBo_4667106
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Hello, 

Is there any update on this issue? I have tried with default FPGA code and still have the issue. 

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AliAsgar
Moderator
Moderator 750 replies posted 50 likes received 500 replies posted
Moderator

Hi,

In the UtoP DMA callback of the FX3 firmware, increment a counter during a PROD event and increment another counter during a CONS event. Make sure that the PROD and CONS notifications are enabled for the DMA channel.

Print these counter values in the for (;;) loop and share with us the UART debug logs.

When the issue occurs, what error is seen on the Control Center software?

Please enable the STREAM_IN_OUT macro in the firmware to enable burst transfers.

Best Regards,
AliAsgar

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ZhBo_4667106
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This is the debug print when I try to send 307200 bytes. 

307200bytes.png

 

This is when I try to send 2500 bytes.

2500bytes.png

 

Control Center software doesn't show any errors or issues. It even shows last address 4AFF0 with all the correct data. But apparently there is CYU3P_PIB_ERR_THR3_RD_UNDERRUN▒▒CYU3P_PIB_ERR_THR3_RD_UNDERRUN error.

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AliAsgar
Moderator
Moderator 750 replies posted 50 likes received 500 replies posted
Moderator

Hi,

Could you try to send a Zero length packet after sending 302700 bytes and check if the issue is still occurring?

Also please try to read data from FX3 based on the flag status. Please refer to AN65964 application note for details on cycle latency between RD signal and Flag. Not having proper flow control between FX3 and FPGA leads to UNDERRUN error. Make sure the timing specs are met according to AN65974.

Best Regards,
AliAsgar

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ZhBo_4667106
Level 1
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The thing is streamer and boolkloop examples work without issues. I am using default projects for FPGA board and FX3 superspeed kit with HSMC connector. Although, instead of Cyclone III starter board used in example AN65974, I am using Cyclone V starter board. Does that mean default projects with  RD signal and flags need to be adjusted to specific board? 

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AliAsgar
Moderator
Moderator 750 replies posted 50 likes received 500 replies posted
Moderator

Hi,

If streamer and bulkloop examples are working fine with the Cyclone V starter boards, I dont think there would be any changes to be made based on the FPGA.

In the Control Center software could you try sending a Zero length packet after sending 307200 bytes and let us know if the data is sent out properly?

Best Regards,
AliAsgar

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