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USB superspeed peripherals

SeKa_293236
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First reply posted First question asked First like given
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Hi,

Reading about SPI boot issues on this forum, I see that FX3 ROM bootloader has a bug. When booting from SPI, bootloader tries to detect number of required address bytes for 03h read command. It sends 03h read command multiple times, first with 1 address byte, then 2 address bytes and then 3, until it starts receiving any non-zero byte from MISO. The problem is that bootloader does not pull-down MISO line with an internal resistor and MISO is just floating. That is why SPI boot is not working when pull-up resistor is present on MISO line. The AN76405 "EZ-USB® FX3™/FX3S™ Boot Options" states "... external pull-ups should not be connected on the MOSI and MISO signals". However, the documents says nothing about pull-down resistor on MISO line and I think such resistor is required. Without it MISO is just floating and any coupled noise can fail SPI boot.

In fact, here SPI Flash Read issue by Cypress Bootloader Firmware (CX3)​ SPI boot was not working when BPL (flash write protection) was set to 1. This is because, bootloader sends read status register 05h command at the beginning, after such command MISO line has a state of bit7 of status register (BPL bit). So for write protected flash MISO was floated much above zero and SPI boot failed. With BPL set to 0, MISO was floated near zero and SPI boot was working. Adding pull-down resistor to MISO solved the problem with BPL=1.

So I have 3 questions to clarify:
(1) Don't you agree that pull-down resistor on MISO line is required and AN76405 "EZ-USB® FX3™/FX3S™ Boot Options" document should be updated to state this?

(2) I see that very first command bootloader sends during SPI boot is 05h read status register command ID byte, however, it does not send additional byte to actually read status register value. That is weird. What is the purpose of such behaviour? After that, it does send 05h command again now with proper additional byte to actually read status register value. Could you clarify what is going on with this first 05h single byte?

(3) AN76405 states that not only MISO, but MOSI also should not have any pull-ups. Could you explain why is that? I have a device connected to MOSI that pulls MOSI up with 1.5M resistor. Is that weak enough to do not create any problems?

PS: Ideally, if you could share ROM bootloader sources -- that could help a lot. I understand you might not want to disclose the whole sources, but maybe it is OK to share only part related to reading from SPI flash.

Kind regards,

Sergey.

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1 Solution
JayakrishnaT_76
Moderator
Moderator First question asked 1000 replies posted 750 replies posted
Moderator

Hello,

Please find my comments for your questions below:

1. Yes, we agree that pull down resistors are required on MISO line to avoid any possible boot failures. The same is recommended in Page 13 of AN70707. The link to the same is given below:

https://www.cypress.com/file/139936/download

We will update AN76405 with this change soon.

2. The ROM Bootloader code is made as compact as possible. Due to this reason, a function may be used for multiple purposes. The behaviour that you see in your question 2 is due to this reuse of a function for multiple purposes. The transmission of 0x05 at the start without sending additional bytes will not affect the functionality. 

3. A pull up or pull down resistor on MOSI line is not recommended. This is because, the SPI master of FX3 may drive a HIGH or LOW voltage irrespective of the pull up or pull down resistor present on the MOSI line. Suppose, the MOSI line is pulled up and the SPI master of FX3 drives LOW, then the data sampled by the slave (flash) may not be LOW. Also, the timings on the slave side can be violated due to the effect of the pull up or pull down resistors. This can cause the slave to sample a wrong data. In your case, the pull up resistor may not be affecting the normal operation as it is too weak.

Also, the ROM Bootloader source code is confidential and cannot be shared.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna

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1 Reply
JayakrishnaT_76
Moderator
Moderator First question asked 1000 replies posted 750 replies posted
Moderator

Hello,

Please find my comments for your questions below:

1. Yes, we agree that pull down resistors are required on MISO line to avoid any possible boot failures. The same is recommended in Page 13 of AN70707. The link to the same is given below:

https://www.cypress.com/file/139936/download

We will update AN76405 with this change soon.

2. The ROM Bootloader code is made as compact as possible. Due to this reason, a function may be used for multiple purposes. The behaviour that you see in your question 2 is due to this reuse of a function for multiple purposes. The transmission of 0x05 at the start without sending additional bytes will not affect the functionality. 

3. A pull up or pull down resistor on MOSI line is not recommended. This is because, the SPI master of FX3 may drive a HIGH or LOW voltage irrespective of the pull up or pull down resistor present on the MOSI line. Suppose, the MOSI line is pulled up and the SPI master of FX3 drives LOW, then the data sampled by the slave (flash) may not be LOW. Also, the timings on the slave side can be violated due to the effect of the pull up or pull down resistors. This can cause the slave to sample a wrong data. In your case, the pull up resistor may not be affecting the normal operation as it is too weak.

Also, the ROM Bootloader source code is confidential and cannot be shared.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna