FPGAmaster verilog code for 16bit gpif2 design

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Anonymous
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Hi Folks,

I am working with FX3s for image streaming.

Is one having working FPGAmaster verilog code for 16 bit GPIF2 designer for streamIN mode, please provide me

Thanks and Best Regards
Vinod Sajjan

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1 Solution
Anonymous
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Hi,

We do not have the FPGA code for 16 bit. However, for developmental purpose, you can use the same 32 bit verilog code available with the An65974 application note project. In the FX3S, you can configure your GPIF designer for 16 bit and the watermark value in the eclipse can be changed according to 16 bits. (use the watermark formula for Cyu3pgpifsocketconfigure API in an65974)

By doing this, thought the FPGA gives out data on all 32 bits, FX3S will only take the data on the first 16 bit lines.Rest are all ignored.

Regards,

- Madhu Sudhan

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2 Replies
Anonymous
Not applicable

Hi,

We do not have the FPGA code for 16 bit. However, for developmental purpose, you can use the same 32 bit verilog code available with the An65974 application note project. In the FX3S, you can configure your GPIF designer for 16 bit and the watermark value in the eclipse can be changed according to 16 bits. (use the watermark formula for Cyu3pgpifsocketconfigure API in an65974)

By doing this, thought the FPGA gives out data on all 32 bits, FX3S will only take the data on the first 16 bit lines.Rest are all ignored.

Regards,

- Madhu Sudhan

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Anonymous
Not applicable

hi,

I am working with FX3s for image streaming.

how to change watermark level??what is the effect on data if i change??

help me i have an issue regarding this??

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