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USB superspeed peripherals

Anonymous
Not applicable

Hi all,

So I'm planning on making a PCB that uses the CYUSB3014-BZX to transfer data between PC software and an FPGA. I've been following AN70707 quite closely, and plan on using I2C boot with EEPROM loaded with my FX3 firmware. However I stumbled across the SRAM on the bottom of the Super Speed Explorer board when checking the design, I just wanted to check what is the main purpose of the SRAM? And if I will need to use it in my design with a I2C boot?

Kind Regards

Ricky Thomson

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1 Solution
HariprasadP_06
Employee
First like received Welcome!
Employee

SRAM on SuperSpeed explorer kit is not needed if you are using FX3  as slave FIFO for above mentioned application. Jumper J5 is used to enable/disable SRAM on the kit. 

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4 Replies
HariprasadP_06
Employee
First like received Welcome!
Employee

SRAM on the explorer kit is interfaced with FX3 over GPIF II interface. The READ and WRITE to/from SRAM is done using the GPIF state machine which is designed for FX3 to communicate with the SRAM. The FX3 GPIF state machine generates READ and WRITE signals which enables the SRAM to move data IN and OUT.

Anonymous
Not applicable

Sorry I think I may have skipped over my main point. Basically, is the SRAM part of the DMA buffers that are used for the exchange of data between the FX3 and any peripheral. For example would I need to include SRAM in my design if I intend on using the FX3 as a FIFO slave (like in AN65974) to move data between my PC software and a FPGA?.

Thanks

Ricky

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HariprasadP_06
Employee
First like received Welcome!
Employee

SRAM on SuperSpeed explorer kit is not needed if you are using FX3  as slave FIFO for above mentioned application. Jumper J5 is used to enable/disable SRAM on the kit. 

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Anonymous
Not applicable

I thought this might be the case. Thanks for the quick reply!

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