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USB superspeed peripherals Forum Discussions

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We are using the Cypress example code SlaveFifoSync. The demonstration host application GUI USB Control center works fine with our FPGA design for single transactions. 
We have developed a host side application in C++ that exercises the API XferData() method function for reads and writes (each from the appropriate handle). 
We have also connected to the Cypress card over a serial link in order to observe output of the CyU3PDebugPrint that the firmware source code is instrumented with. 
What we initially observe on the firmware console debug are messages that appear at 1 second intervals that confirm that the firmware is in good working order. 
When we run our host application which comprises a sequence of calls to XferData() for reads and writes (to CSRs in our FPGA design) is that a varying number of these complete successfully and then there is an apparent hang where some access never completes. On the debug console, the messages emitted at 1 second intervals have stopped. 
We have further instrumented the firmware source code with CyU3PDebugPrint and isolated a function that never seems to return: 
status = CyU3PDmaChannelCommitBuffer(chHandle, input->buffer_p.count, 
We have also attached a logic analyzer on the slave bus between the Cypress card and the FPGA and observed that expected transactions are not appearing at the interface when we expect Cypress to drive the bus. 
We have found that introducing a delay (Sleep()) of 100 milliseconds into the host application after each call to the Cypress API XferData is sufficient to cause all the host generated accesses to proceed normally. We have observed that a delay of 10 milliseconds is insufficient. 
That we need to pace the host application to workaround an apparent firmware issue is unacceptable. Our application requirements for full speed application cannot tolerate even a delay of 10 milliseconds. What we want is a stable, production ready code that implements the functionality of SlaveFifoSync at full speed. 

We assume that customers using this chip in production must be using a fullspeed version of this firmware - please let us know if we can have access to this or if the expectation is for us to somehow develop our own. 

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Could you please use the SlaveFifoSync project associated with AN65974:

AN65974 - Designing with the EZ-USB® FX3™ Slave FIFO Interface | Cypress Semiconductor 

CyU3PDmaChannelCommitBuffer() fails if there aren't any DMA buffers avaialbale for the Producer socket to fill.

You can increse the DMA buffer size and DMA buffer count.(Total available DMA buffer space in FX3 (CYUSB3014) RAM is 224 KB. If you are not using second-stage bootloader, you can make use of an extra 32KB by setting the macro CY_U3P_SYS_MEM_TOP to 0x40080000 in cyfxtx.c file of the AN65974 project)

Could you test with the Streamer Host Application provided in FX3 SDK

(C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\application\cpp\streamer\x86\Release) and check if you are still observing the issue.