Difficulty with FX3 3011 buffer full

[e_drouin]

Hi everyone!

I'm currently working on a custom board which connects a FPGA to the Cypress FX3 3011 using the GPIF 16bits interface. We have several types of data coming through, but the one we have problems with is a camera. The system doesn't have any image buffer, only a few fifos in the FPGA that can buffer a few lines of data at a time. The problems come when we do longer test using our system. If we use the computer for other things than acquiring data, the buffers along the chain sometimes back up into the FPGA. What I see using the probes inside the FPGA is that the FLAGA of the GPIF interface doesn't come up in time. I was wondering if the problem can come from how we send the data to the FX3. At the moment, we send short packets using the PKEND signal would it be more efficient to send full frame? I tried it but didn't quite understand the explanation in the AN65974 about the cycle of delay between SLWR and the FLAGs and without this information it didn't quite work.

Here is little more information about our FX3 configuration, it is using the code from the AN65974 example design with a few changes. Here is the DMA config for the P2U:

/* Create a DMA AUTO channel for P2U transfer. */
dmaCfg.size = CY_FX_SLFIFO_DMA_BUF_SIZE * size; //14*1024
dmaCfg.count = CY_FX_SLFIFO_DMA_BUF_COUNT;//2
dmaCfg.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;
dmaCfg.consSckId = CY_FX_CONSUMER_USB_SOCKET;
dmaCfg.notification = 0;
dmaCfg.cb = NULL;

The other solution we had was to test the same code (with bigger buffer) and board with a FX3 3013. Would you think that it would resolve the problem?

I've attached my code for the usb module on the FPGA.

Thaks all!

[Rashi_Vatsa · Accepted solution]

Hello,

From the description, I understand that when there are other activities done by the computer / USB host there is buffer overflow on the FPGA side. Is my understanding correct?

If yes, the DMA flags will indicate the status of the DMA buffers on FX3. If the USB host is slow in consuming the  video data in the DMA buffer than the rate at which video data is sent by FPGA, then DMA buffers will be full and DMA Ready FLAG will be asserted.

To resolve the issue, please use bigger DMA buffers. Please refer to this KBA DMA buffer count and size allocation in EZ-USB™ FX... - Infineon Developer Community . Also, the data transfers will be faster if the DMA buffer size is a multiple of endpoint size. For example, if the endpoint size is 16KB (16 (burst) *1024) then DMA buffer size can be 16KB or 32KB.