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Hi,
I would like to use the CYUSB3KIT-003 board.
The CYUSB301X datasheet defined that GPIF II can operate at 100MHz at 32bit data bus.
When I look on the CYUSB3KIT-003 layout file I can see a big stub between connector J6 and SRAM memory U5.
Does the 32 bit GPIF II bus can operate at 100MHz with that stub when the CYUSB3KIT-003 connected to FPGA (signals goes from U2 to J6 and than to the FPGA and the trace between J6 and U5 is big stub)?
Did you worked at this mode?
What is the usage of the SRAM (U5) on the board? Is it for easy way to test transactions from PC to memory?
Regards
Roni
Solved! Go to Solution.
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Hello Roni,
The use of SRAM with FX3 is shown in the below example code, you can test this with the CYUSB3KIT-003 kit.
C:\Program Files (x86)\Cypress\SuperSpeed Explorer Kit\1.0\Firmware\SRAM_FX3
And related hardware is working at 100MHz with FPGA.
Best Regards,
Biren
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Hello Roni,
The use of SRAM with FX3 is shown in the below example code, you can test this with the CYUSB3KIT-003 kit.
C:\Program Files (x86)\Cypress\SuperSpeed Explorer Kit\1.0\Firmware\SRAM_FX3
And related hardware is working at 100MHz with FPGA.
Best Regards,
Biren