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USB superspeed peripherals Forum Discussions

AnXu_4255976
Level 1
Level 1

Hello ,

Present I encounter a solution issue.

I don't know whether CYUSB3014 can realize the function as below,

I want to use GPIF in CYUSB3014 as master transfer data to peripheral 2,but we don't have peripheral 1.

The data size to be  transferred around 60KB and peripheral 2 is a 8 bits parallel with data rates around 50MHz slave device.

The slave device without any feedback signals to CYUSB3014.

CYPRESS_FX3.jpg

The questions as below,

Can I use part of SRAM in side the CYUSB3014 as peripheral 1 ??

If yes,how to realize it?

If no,do you have solution on it?

Thanks a lot.

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1 Solution

Hello,

We suggest using the DMA buffer area i.e. by creating a DMA channel as follows:

(1) SPI to CPU and CPU to PIB  (MANUAL channel )  or

(2) SPI to PIB (AUTO/MANUAL channel)

This is because transfers using the DMA buffers will be faster compared to using the DATA region. Moreover, the DMA buffer area(using DMA channel) is a standard way to transfer the data from different Low-speed peripheral blocks like SPI to GPIF block. Using the DATA region for storing the data and then reading back will make the transfers slow as compared to DMA transfers

If your application needs some processing on the data (received from SPI Flash), MANUAL channel can be used, or if no processing is to be done on the data then AUTO DMA channels can be used which will be faster than the MANUAL DMA channel

Please let me know if more queries on this

Regards,

Rashi

Regards,
Rashi

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12 Replies
Rashi_Vatsa
Moderator
Moderator
Moderator
5 likes given 500 solutions authored 1000 replies posted

Hello,

From the description, I understand that you want to send data to a slave via GPIF interface. The data should need to be sent from the CPU socket of FX3 i.e. the DMA buffer will be filled inside the FX3 and sent out to slave device via GPIF. Is my understanding correct?

If yes, you can use MANUAL OUT channel (CY_U3P_DMA_TYPE_MANUAL_OUT) where the CPU socket will be the producer and PIB socket can be the  Consumer.You can refer to Bulksrcsink firmware of the FX3 SDK where the data is sent through a MANUAL OUT channel (from CPU/FX3 to USB). In the similar manner channel can be created from CPU to PIB.

Note: Sending data from CPU to PIB should be in sync with the GPIF state machine so that the data transfers are successful

Please let me know if any queries on this

Regards,

Rashi

Regards,
Rashi
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Hello,

I just read the below information and it is a little different with you said.

Can I create DMA MANUAL IN channel between the producer embedded SRAM and the CPU?

Thank you. 

SRAM_DMA_SLAVEDEVICE.jpg

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Hello,

Please refer to figure 5-2 of FX3's Programmer manual which shows the memory map of FX3's RAM. The DMA buffers are also allotted the memory from the FX3's RAM "DMA Buffer AREA"

Please refer to the description of the DMA channels in table 5-2 of FX3's Programmer manual

MANUAL_IN.PNG

Please let me know from which area (figure 5-2) of the FX3's RAM are you planning to read data and send it to GPIF.

Regards,

Rashi

Regards,
Rashi
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Hello Rashi,

See below photo,part of data in green rectangle will be transferred to DMA buffer then to PIB interface.

Do you mean it can be realized?

Thanks.

SRAM_DMA_SLAVEDEVICE--.jpg

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Hello,

Please let me know more details so that I can help you better

- Let me know the reason for reading from the DATA area of FX3's RAM

- Which region of the DATA area are you planning to read?

The data area includes all uninitialized and zero-initialized global data/constant memory. This does not include dynamically-allocated memory.

So, are you planning to read the uninitialized and zero-initialized global data/constant memory?

- Please let me know how will 60 KB data be stored in the data area of FX3's RAM initially

Regards,

Rashi

Regards,
Rashi
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Hello Rashi,

Thanks for your quick response.

Please refer to below detail description,

SRAM_DMA_SLAVEDEVICE---time.jpg

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Hello,

Thank you for the description

From the description, I understand that the FX3 will boot from the Flash, and after booting some data will be read from the flash. The same data needs to be sent to the slave device. Is my understanding correct?

If yes, after booting the firmware from flash, a DMA channel can be created from SPI to PIB. In this way, the data stored in flash can be read by the producer socket (SPI) and then sent to the consumer socket (PIB)

Please let me know if this would work for your application

Regards,

Rashi

Regards,
Rashi
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Hello Rashiv,

From the description, I understand that the FX3 will boot from the Flash, and after booting some data will be read from the flash. The same data needs to be sent to the slave device. Is my understanding correct?

If yes, after booting the firmware from flash, a DMA channel can be created from SPI to PIB. In this way, the data stored in flash can be read by the producer socket (SPI) and then sent to the consumer socket (PIB)

>>Not correct at all, if we want to use SPI to DMA to PIB and I will not ask you so many questions.

     My goal as follow, system boot from SPI flash,after booting ,FX3 read data from SPI flash to embedded SRAM

     DATA2 area. Finally,I want to transfer the data in DATA2 area through DMA to PIB then to slave device.

Is it OK??

    

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Hello,

Please let me know why does your application needs to store the data in the DATA region of the FX3's RAM.

Is it like some processing needs to be done on the data after reading from it from the SPI Flash?

Before commenting on the feasibility of reading and writing from/to the DATA region of FX3's RAM we would need to know why is DATA region of FX3 needs to be used for storing data when the same thing can be done using the DMA buffer area of the FX3's RAM i.e. by creating a DMA channel as per the requirement (for example SPI to CPU and CPU to PIB)

Regards,

Rashi

Regards,
Rashi
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Hello Rashi,

SPI is a serial bus and the bus rates too slow to reach my requirements.

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Hello,

We suggest using the DMA buffer area i.e. by creating a DMA channel as follows:

(1) SPI to CPU and CPU to PIB  (MANUAL channel )  or

(2) SPI to PIB (AUTO/MANUAL channel)

This is because transfers using the DMA buffers will be faster compared to using the DATA region. Moreover, the DMA buffer area(using DMA channel) is a standard way to transfer the data from different Low-speed peripheral blocks like SPI to GPIF block. Using the DATA region for storing the data and then reading back will make the transfers slow as compared to DMA transfers

If your application needs some processing on the data (received from SPI Flash), MANUAL channel can be used, or if no processing is to be done on the data then AUTO DMA channels can be used which will be faster than the MANUAL DMA channel

Please let me know if more queries on this

Regards,

Rashi

Regards,
Rashi
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Hello Rashi,

Thank you very much for your active support.

We will do some experiments on this.

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