CX3, H-Blank not a constant fixed value

[AkCh_1378701]

Hi sir,

Encountering an issue that h-sync cannot be generated correctly...

According the waveform measurement of mipi data lane + , that h-blank (LP)  not a fixed value all the time... as the red rectangle highlighted, they have lower h-blank time than others..  it is caused by the ISP doing additional processing..

Question,

Does CX3 RX expect the all h-blank period (LP) to be identical?

thanks

[abhinavg_21]

Hi Akeem,

Please mention which video format you are streaming? Non uniform HSYNC signals are expected in some video formats. Also please share the config utility screenshot.

Thanks & Regards
Abhinav

[AkCh_1378701]

The ISP outputs YUY2 format..

The configurations as below

Though The utility doesn't show errors for those configurations.. but, i could not see h-sync signal being generated (keeps logic-high all the time)... 

please recommend a way to debug the problem..

thank you

[abhinavg_21]

Hi Akeem,

Can you please try it again with the attached configurations? I am using 24 bits output data instead of 16 bits. This will reduce the min requirement of output pixel clock and also improves FIFO delay.

Thanks & Regards
Abhinav

[AkCh_1378701]

Thanks sir,

Have a quick question regarding to 24bits output data... can i expect that i still can get a YUV422 format by using standard AMCAP.exe??

i am a bit confused that, YUV422 in AMCAP has 16bits width, how is that related to 24bits output data from GPIF block?

[abhinavg_21]

Hi,

Yes you will still get YUV422 data 16 bits only. By using 24 bits as output we are making use of extra available BW to send more pixel data in one clock cycle.

Is it working fine now?

Thanks & Regards
Abhinav

[AkCh_1378701]

Hi Abhinav,

The CX3_Conf has PIXEL_CLOCK error, not allow me to build the firmware, did i miss something?

[abhinavg_21 · Accepted solution]

Hi Akeem,

There are few bugs in the tool. Soon we will remove these bugs. For the time being I have checked the CX3 configuration it seems fine you can ignore the warnings and use the files generated by this tool in your project.

Thanks & Regards
Abhinav

[AkCh_1378701]

Thanks a lot

i managed to get video by using 2 lanes combined with certain “magic number“ pll multiplier value..

i have not figured the rule yet for the 4 lanes.. it seems to me when enabled 4 lanes .. it is too fast to be used for the GPIF block in most cases.  there is a constraint from the ISP the mipi clock cannot be decreased much..

the compiler and linker i am using does not allow me the ignore the  error caused by the bug of the tool..

I guess that the benefic we can get by using 4 lanes mipi is limited ....

[AkCh_1378701]

Thanks Abhinav,

In response to the original question -> CX3, H-Blank not a constant fixed value..

it seems b-blanks and v-blanks both do not have to be identical values..

H-Active and V-Active do need...

I guess the question has been answered.. the issue can be closed..  thank you