CX3 24bit-bus padding issue

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LeoChen
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25 replies posted 50 sign-ins 10 replies posted

Hi,

I am working with a sensor at 1280x720@30fps YUV422_8 output, I want to use 24bit-bus to transfer data. But when I set up this project, I found there was data padded to the frame, and I can't preview the frame directly by Amcap. I understand it is because the line size can't be divided by 24bit, then there is data padding. So I want to know how the data is padded to each frame, and how to get rid of the padded data on each frame?

屏幕截图 2022-05-23 180935.png屏幕截图 2022-05-23 180912.png

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1 Solution
Rashi_Vatsa
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Hello,

'm using RGB888 in CyU3PMipicsiCfg_t, so I think there have no padding on every PCLK edge, right?

>> Yes, the padding will be done on every clock edge as 16 bits will be the data received from sensor and rest 8 bits will be padded.

The frame size received currently doesn't seem to be correct and that could be because of line size (not multiple of 24 bits)

Regards,
Rashi

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Rashi_Vatsa
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Hello,

The padding will be done at every clock cycle i.e. when 16 bits are sampled on GPIF block, 6 bits will be padded on every PCLK edge. 

Please let me know if any queries on this

Regards,
Rashi
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Hi Rashi,

I think you may have not get my question.

I am working with a sensor 1280*724@30fps yuv8, and configure CX3 to use 24bit parallel bus to transfer the data to USB.

The original frame size is 1280*724*2=1853440Bytes, but as you can see from above log, the frame zise change to 1859232Bytes, which is (1280+4)*724*2, there is 4 *2Bytes padded to each line I think, is this right? So how is the padding works?

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Rashi_Vatsa
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Hello,

Apologies for the misunderstanding.

which is (1280+4)*724*2, there is 4 *2Bytes padded to each line I think, is this right? So how is the padding works?

>> This is not expected. This could be because the line size (1280*2) is not a multiple of 24 bits (3 bytes)

If YUV (16 bits/pixel) is sent using 24 bit GPIF bus, then 8 bits will be padded on every PCLK edge. 

Regards,
Rashi
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Hi Rashi,

I'm using RGB888 in CyU3PMipicsiCfg_t, so I think there have no padding on every PCLK edge, right?

I have printed the frame size in above picture, it semms that there is padding at the end of each line, and how the padding works?

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Rashi_Vatsa
Moderator
Moderator
Moderator
5 likes given 500 solutions authored 1000 replies posted

Hello,

'm using RGB888 in CyU3PMipicsiCfg_t, so I think there have no padding on every PCLK edge, right?

>> Yes, the padding will be done on every clock edge as 16 bits will be the data received from sensor and rest 8 bits will be padded.

The frame size received currently doesn't seem to be correct and that could be because of line size (not multiple of 24 bits)

Regards,
Rashi
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Hi Rashi,

Please note that  I have used RGB888 in CyU3PMipicsiCfg_t, from KBA224387, I think there will be no padding on every clock edge, please help to confirm!

And I also tested a resolution which is 1920*1280@30fps YUV8 with 24bit bus, of cousre set RGB888 in CyU3PMipicsiCfg_t, whose line size is multiple of 24 bits, and got frame size is 1920*2*1280 bytes but not 1920*3*1280 bytes, it seems there is no padding on every clock edge, so how to explain this?

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Hi Rashi,

Please note that  I have used RGB888 in CyU3PMipicsiCfg_t, from KBA224387, I think there will be no padding on every clock edge, please help to confirm!

And I also tested a resolution which is 1920*1280@30fps YUV8 with 24bit bus, of cousre set RGB888 in CyU3PMipicsiCfg_t, whose line size is multiple of 24 bits, and got frame size is 1920*2*1280 bytes but not 1920*3*1280 bytes, it seems there is no padding on every clock edge, so how to explain this?

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Hi Rashi,

Could you help to clarify my confusion?Thanks!

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