USB low-full-high speed peripherals Forum Discussions
Hi,
Onto our FX2LP18 based board, we use the GPIF and SlaveFIFO mode where IFCLK is used.
The IFCLK will be connected to 3 components : one FPGA, one CPLD and potentially another FPGA (Daughter Board thoufh a FMC connector).
Do we need to bufferise the IFCLK in such condition ? Is the output capability of the FX2LP18 is enought to drive the 3 components ?
Thanks.
Show LessIn the attached streaming example provided by Cypress, if I change the firm ware for an external clock, it stops working.
Here is the code;
void TD_Init(void) // Called once at startup
{
int i,j;
CPUCS = 0x12; // CLKSPD[1:0]=10, for 48MHz operation
// CLKOE=1, drive CLKOUT
SYNCDELAY;
// set the slave FIFO interface to 48MHz
IFCONFIG |= 0x40;
SYNCDELAY;
// Default interface uses endpoint 2, zero the valid bit on all others
// Just using endpoint 2, zero the valid bit on all others
EP1OUTCFG = (EP1OUTCFG & 0x7F);
SYNCDELAY;
EP1INCFG = (EP1INCFG & 0x7F);
SYNCDELAY;
EP4CFG = (EP4CFG & 0x7F);
SYNCDELAY;
EP6CFG = (EP6CFG & 0x7F);
SYNCDELAY;
EP8CFG = (EP8CFG & 0x7F);
SYNCDELAY;
EP2CFG = 0xE0; // EP2 is DIR=IN, TYPE=BULK, SIZE=512, BUF=4x
// We want to get SOF interrupts
USBIE |= bmSOF;
mycount = 0;
// Prepare data
for (i=1;i<5;i++)
{
EP2FIFOBUF[0] = LSB(mycount);
EP2FIFOBUF[1] = MSB(mycount);
EP2FIFOBUF[2] = USBFRAMEL;
EP2FIFOBUF[3] = USBFRAMEH;
EP2FIFOBUF[4] = MICROFRAME;
for (j=5;j<1024;j++)
{
EP2FIFOBUF
}
EP2BCH = 0x02;
EP2BCL = 0x00;
}
Rwuen = TRUE; // Enable remote-wakeup
////////////////////////////////////////////////////////////////////////////////////////////////////////// The following two lines is what I add./////////////////////////////////////////////
IFCONFIG = 0x43; // Slave FIFO mode of FX2LP
SYNCDELAY;
}
Show LessHello, tell me, is it possible to change the MaxPacketSize value from 8 to 64 bytes, in Endpoint 0?
In the user guide, it is written that I can get information about all registers, including BIOS, how can I get it?
Dear Sirs,
my company sells several devices which uses Cypress USB FX2 chips. Since 2010 we have always used the ourselves WHQL-signed CyUSB.sys driver for our devices. Now we would like to update the driver to Cyusb3.sys release. We would like to get the drivers properly signed by Microsoft. I read the "Driver Resell" paragraph in Cypress's CyUsb3 Reference and I understood almost all the steps required.
My question is : looking at GlobalSign website information it's possible to select among three different key storage options: (http://https://www.globalsign.com/en/code-signing-certificate/microsoft-authenticode)
- Cryptographic USB token
- HSM (Hardware Safe Machine ?)
- Azure Key Vault
To complete via Cypress the resell process, I suppose, that the preferred option should be "Azure Key Vault". Is it correct ?
Thank you in advance and
Best regards,
Stefano Frondizi (SFrondizi@BVImedical.com)
Optikon 2000 S.p.a
Rome Italy
Show LessWe have been using CY7C68013A 128 PIN for three years, which is used for communication between upper computer and FPGA, and FIFO Read to operate GPIF interface mode, which is pass-through and does not require firmware operation data.
The problem is that there is no problem with the chip work of the old batch. Since the new batch of chips is used, it is found that there is error data in the transmission process, and the higher the temperature is, the greater the number of error data will be, which is positively correlated with the temperature. However, this problem will not occur with the chip of the old batch!
We let the FPGA generate a set of standard data that the upper computer reads.
No matter how hot the chip of the old batch is, there will be no error data, but the chip of the new batch will have error data, the data is as follows, and the higher the temperature is, the more error data will be. In addition, the actual operating temperature of the chip is about 40℃. The scattered data in the picture is the wrong data.
The old batch (17 years old) chip inventory will soon be exhausted
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Hello,
When configured as an SPI slave how does the buffer work on this part? Does the buffer erase the oldest characters, or does it not allow new characters when the buffer becomes full?
Thank you,
Jake
Show LessI'm considering designing a USB interface using the FX2LP and have some questions about device drivers. Is there a Windows 10 driver for the FX2LP? Will I need to apply for a USB vendor code for production use or can I use the Cypress vendor code? What about driver signing - do I need to get any drivers signed by Microsoft and is this difficult?
Show LessHello,
When the CY7C65211A is configured as an SPI slave you are able to configure GPIO1/0 for an Rx and Tx LED. I noticed that the LEDs do not start to change state until after a certain amount of clock signals. My question is are these signals fixed where they turn on and off after a certain amount of clock periods?
Thank you,
Jake
Show LessDear all,
I'm currently working on CY7C65215 i would like to know how to perform an SPI loopback (pin/jumper set up) and if there is any example code (c++, c, python) on how to set one spi to slave and the other to master and perform loopback communication (like the UART example but without using SPI EEprom).
Thanks in advance.
Have a nice day.
Show LessI designed a new board using CY7C65211. My computer is Dell XPS 13 with Windows 10 Pro.
After installed CypressDriverInstaller_1.exe, I connected the board to USB port. I checked the Device Manger.
There is "Unknown USB Device (Device Descriptor Request Failed)". I did the manual point to download driver.
(Please see attached file for error.)
The error is still the same. Please educate me what I did wrong.
Million thanks in advance.
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