USB low-full-high speed peripherals Forum Discussions

Hi,

Another day, another question ... 🙂

We are finalizing our Firmware.

One question regarding the Descriptor Name.

We want to display something like that : 

"STMicroelectronics STiceX emulator"

I create the dscr.asm accordingly. 

But the display of the device.name is corrupted (file attached) ??

Could you verify my dscr.scm ?

I tried numerous things but always strange name is displayed (Note that it seems to work if i reduce the name lenght ...??).

I'm using Eclipse, SDCC and your framework based onto bulkloop example.

Regards.

.even ; descriptors must be 2-byte aligned for SUDPTR{H,L} to work
_StringDscr1:
.db StringDscr1_End-_StringDscr1 ;; String descriptor length
.db DSCR_STRING
StringDscr1_End:

.even ; descriptors must be 2-byte aligned for SUDPTR{H,L} to work
_StringDscr2:
.db StringDscr2_End-_StringDscr2 ;; Descriptor length
.db DSCR_STRING
.db 'S',00
.db 'T',00
.db 'M',00
.db 'i',00
.db 'c',00
.db 'r',00
.db 'o',00
.db 'e',00
.db 'l',00
.db 'e',00
.db 'c',00
.db 't',00
.db 'r',00
.db 'o',00
.db 'n',00
.db 'i',00
.db 'c',00
.db 's',00
.db ' ',00
.db 'S',00
.db 'T',00
.db 'i',00
.db 'c',00
.db 'e',00
.db 'X',00
.db ' ',00
.db 'e',00
.db 'm',00
.db 'u',00
.db 'l',00
.db 'a',00
.db 't',00
.db 'o',00
.db 'r',00
.db ' ',00
.db ' ',00
.db ' ',00
StringDscr2_End:

Hi,

We are wroing on a reference design using a PSoC 62 and a CY7C65215 as USB-UART bridge to debug. While usign the last one in bus powered mode we have noticed that if we connect the 5V USB to the CY7C65215 while there is no power on the PSoC 62 there is current flowing on the 3V3 supply of the PSoC (main supply of the PSoC). So basically the USB-UART bridge is pulling something up. Functionality is softwarewise is ok and debug messages work perfectly fine.

We have also noticed the opposite: if there is no 5V USB supply on the CY7C65215 side, then there is current flowing trough the 5V USB supply to ground when we connect 3V3 to the PSoC. 

Is this the expecting behaviour of the CY7C65215 in bus powered mode? or do we need to configure anything else on the PSoC side? Configuration is ok per what we see on the serial configuration utility. Find attached some screen shots fo the schematics.

Thanks in advance

Ariel

In my fx2lp-application the 8051-CPU collects data via interrupt and wants to write the bytes into EP2IN fifo.

So..plain CPU driven EP2IN filling.

I wonder what buffering of the fifo i should select (quad,trible,dual?) to be able to not worry about USB transfers.

and what the init for the endpoint would be?

maybe there is an example code available.

thanks

Dear Sir or Madam,

Since I am neither a professional programmer nor a lawyer, I have a question regarding the license of the CyUSB.dll.

I designed a control app for the Octaflow II system from ALA Scientific, using MATLAB.
The official control software from ALA Scientific uses the CyUSB.dll v1.2.2.0 and cyusb3.sys v1.2.3.14 to communicate with the device.
For my MATLAB app I had to use the version v1.2.3.0 of the CyUSB.dll, which I did not altered, but when I compile the app as a stand-alone desktop app, the dll is part of the compiled exe right now.
Now I am thinking to share my app for free. However I am not sure if I am allowed to do so, if the CyUSB.dll is integrated in the compiled app.
Could you please tell me, if you allow me to include the dll in my compiled app, if I have to share the dll separately or if I am not allowed to share the dll at all.
In case I am allowed to share your dll together with my app, how should I cite you as the developer and right owner of the dll?
Kind regards,
MichaelR

We are designing a board that we want to use with as many Android phones as possible.  What would be the most generic, widely support USB 2.0 chipset that we can use?

Thanks

Alot

Hi,

I use the SlaveFIFO mode (in 16bits mode) to communicate with my FPGA.

I use alos EP2 for OUT and EP6 for IN.

The 4 flags are also used.

I attached the waveforms managed by the FPGA. All seems OK this side.

In the example command is a "READ" in our protocol : 10 bytes are sent through EP2 : the 5 SLRD_N pulses after FLAGB (EP2EF) falling edge.  This 5 bytes create one base adress and a size to read.

Then the FPGA changes the direction, and the SLWR_N is asserted each time a data is read. After the first SLWR_N assertion the FLAG_D (EF6EF) goes high. SO the SLWR_N is correctly seen by the FX2LP18. 

The FDATA seems correct. The FIFOADD seems correct.  At the end the PKEND_N is asserted one cycle. After the PKEND_N assertion, FLAGD goes high.  So all seems correct.

But, doing a XferData in windows side does not return the EP6 expected values ....  

len = 256;
success = myDevice.BulkInEndPt.XferData(ref buffer0, ref len); //check if transfer successfull

Could you check if there is an issue in the firmware perhaps ? I do not understand why the EP6 seems empty ...

I can share you all the firmware if needed ...

Here just the main function that activate the SLave Fifo mode of the Firmware is in the void Set_EP2_EP6_SlaveFIFO (void) function :

void Set_EP2_EP6_SlaveFIFO (void)
{

// To see transaction of bit AUTO
EP2FIFOCFG = 0x00;
SYNCDELAY;

// CLKsrc=int, IFCLK=48MHz, IFCLK Output Enable, Synchronous, Slave FIFO
//IFCONFIG = (bmIFCLKSRC | bm3048MHZ | bmIFCLKPOL | bmIFCLKOE | bmIFCFG1 | bmIFCFG0);
IFCONFIG = (bmIFCLKSRC | bmIFCLKOE | bmIFCFG1 | bmIFCFG0);
SYNCDELAY;

REVCTL = 0x00; // ENH_PKT=0, DYN_OUT=0 no need to prime the pump after bit AutoOut=1
SYNCDELAY;

// Update Firmware to map documentation !
PINFLAGSAB = 0x8C; // FLAGA = EP2FF, FLAGB = EP2EF
SYNCDELAY;
PINFLAGSCD = 0xAE; // FLAGC = EP6FF, FLAGD = EP6EF
SYNCDELAY;

PORTACFG = bmFLAGD; // Set FLAGD as alternate ftn on pin PA7
SYNCDELAY;

FIFOPINPOLAR = 0x00; // All active Low (PKTEND,SLOE,SLRD,SLWR,EF,FF)
SYNCDELAY;

fifo_reset();
fifo_config();

if (EZUSB_HIGHSPEED())
{ // FX2 enumerated at high speed
EP6AUTOINLENH = 0x04; // set AUTOIN commit length to 1024 bytes
SYNCDELAY; //
EP6AUTOINLENL = 0x00;
SYNCDELAY;
}
else
{ // FX2 enumerated at full speed OH MY GOD !!!!! DO WE REALY WANT TO USE IT IN FULL SPEED ???
EP6AUTOINLENH = 0x00; // set AUTOIN commit length to 64 bytes
SYNCDELAY;
EP6AUTOINLENL = 0x40;
SYNCDELAY;
}
}

void fifo_reset()
{
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x02; // reset, FIFO 2
SYNCDELAY; //
FIFORESET = 0x04; // reset, FIFO 4
SYNCDELAY; //
FIFORESET = 0x06; // reset, FIFO 6
SYNCDELAY; //
FIFORESET = 0x08; // reset, FIFO 8
SYNCDELAY; //
FIFORESET = 0x00; // deactivate NAK-ALL
SYNCDELAY;
}

void fifo_config()
{
EP2FIFOCFG = 0x00; // allow core to see zero to one transition of auto out bit WORDWIDE = 1
SYNCDELAY;
EP2FIFOCFG = 0x11; // auto out mode, disable PKTEND zero length send, word ops
SYNCDELAY;
EP6FIFOCFG = 0x09; // auto in mode, disable PKTEND zero length send, word ops
SYNCDELAY;
}

Hello

It is related to this thread.

https://community.cypress.com/t5/USB-Low-Full-High-Speed/CY7C65211A-Set-Line-Coding/m-p/264392#M9127

The connection is exactly what Pranava thinks.
Currently, at the time of device enumeration, the following descriptor notifies Set_Line_Coding support (Offset 3-D1-1).

Is it possible to change this to non-compliant (D1 = 0)?

Best Regards

Hayato

Hello,

I'm curious to know if it should be possible to send an invalid vendor request code to the Default USB device on an FX2[LP]. I know that the request code 0xa0 is always recognized before and after renumeration. I attempted to send another code that is implemented in our firmware to the default USB device and I expected that it would simply reject the request and stall endpoint 0. In our Windows driver when I attempted to send a URB that packages that vendor request, USBD seems to block indefinitely. After seeing that, I put in logic to cancel the IRP after a timeout elapsed. However, when I went to continue through our usual process of downloading firmware, it seems to malfunction, as if it consumed part of my invalid vendor request and cached it before processing the subsequent 0xa0 vendor request.

Is this just something I should completely avoid doing [sending unrecognized vendor request codes to it]? I managed to move on to a different technique but my motivation was to try to discern between our device having renumerated with firmware and a fresh firmware-less enumeration state. Granted, one can use vendor, product, and device ID combinations to deduce this, but this was something of an academic exercise for me and I'm genuinely curious. I could not find anything in the TRM that would tell me what to expect under this scenario.

~Thanks