USB low-full-high speed peripherals Forum Discussions
Hi
We are using the CY7C65211 to communicate with a slave I2C device. I am having difficulties setting up the CyI2CRead. The register I want to read from is 0xA3 and I have been specifying the register that we need to read on the I2C device using the first address of the rbuffer, as shown below:
rbuffer[0]= 0xA3;
rbuffer[1]= 0
dataBufferRead.length = 1 ;
dataBufferRead.buffer = rbuffer;
rStatus = CyI2cRead (handle, &i2cDataConfig, &dataBufferRead, 5000);
When I check the I2C bus, the slave device address is correct, but the register byte is never correct. I am not sure if I have setup the send buffer correctly.
Can you provide help on how to setup a read from a slave device? Specifically how do I specify the register on the device that we want to read. I am running on Ubuntu kernel 5.10.
Thanks
Show LessI have an external device which has two signals , one is start of frame and , which I use as an interrupt to the FX2lp and a data enable signal which i want to write to fx2lp using SLWR pin. Basically i use fx2lp in slave FIFO mode. Now my target is that when I receive a falling edge interrupt and the SLWR goes low at the same time , I must start reading the data. I use EP2 buffer to get the data.
I observe that i cant get any data after connecting the device and fx2lp.
I am attaching the code below.
I am using a manual in transfer method using INPKTEND register to transfer the data and have a 16 bit data stream.
I am following this example thread for some clues Interfacing FX2LP™ with Image Sensor – KBA95736 - Infineon Developer Community
kindly help me with this issue. Do i miss something here?
Show LessWhen there is no data in the FIFO of FX2(CY68013), if we use the upper computer(control center supplied by cypress ) to read the USB, something wrong will happen: no matter whether there is data in FIFO, the subsequent reads are all unsuccessful.
However, this situation doesn't occur in FX3(USB3014). I have tested it.
If this problem in fx2 can be solved, Can you tell me the solution?
THANK U !!!
Hi infineon,
Hi, there
I'm working on USB serial i2c example based on cy7c65215 USB to serial bridge.
I find that if change the variable CY_I2C_CONFIG and CY_I2C_DATA_CONFIG to a static variable, the waveform output from cy7c65215 goes to an unexpected waveform, quite different from what I set
the picture up there is the right waveform that I expect the slave address is 0x69 when I did not add the 'static' before the variable definition.
but if I add the 'static ' keyword before the variable definition, the waveform goes bad, like the picture below
Does anyone know what goes on after I add the static keyword?
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Hello,
Is there a possibility to store data stream coming into the Host in some text format or any other format ?
Hello,
I have an application which should monitor two ready pins and then trigger the data transaction.
However, when I check the GPIFREADYSTAT register it never updates.
What could be the possible cause ?
Show LessI'm working on to develop usb 2.0 host firmware which can handle USB camera(UVC).
The device(WebCam) provides video data through isochronous endpoint.
In the attached file you can hava a look what kind of interfaces and end points are supported by the device.
Belows are my fisrt test code but I'm not sure if I configure it properly.
Any comments will be highly appreciated.
glHostUvcEp = 0x81;
size = 1024;
/* Initialize the UVC */
CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof(epCfg));
//epCfg.type = CY_U3P_USB_EP_BULK;
epCfg.type = CY_U3P_USB_EP_ISO;
epCfg.mult = 1;
epCfg.maxPktSize = size;
epCfg.pollingRate = 0;
/* Since DMA buffer sizes can only be multiple of 16 bytes and
* also since this is an interrupt endpoint where the max data
* packet size is same as the maxPktSize field, the fullPktSize
* has to be a multiple of 16 bytes. */
size = ((size + 0x0F) & ~0x0F);
epCfg.fullPktSize = size;
epCfg.isStreamMode = CyFalse;
status = CyU3PUsbHostEpAdd (glHostUvcEp, &epCfg);
The structure of the descriptors in the pdf is simplified as below.
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We have a CY7C68013 FX2LP processor connected to an FPGA device. Data is received from a host processor via Full Speed USB on EP2. Since it is FS USB, each packet is 64 bytes. The FX2LP processor then commits each 64-byte packet in EP2FIFOBUF to the peripheral domain and writes data to the FPGA via GPIF. I noticed that the data stream from the host processor contained large batches of contiguous zeros. To reduce USB transmission time, I devised a scheme for the host to send a special command to the FX2LP processor to generate the zeros locally. After receiving the command, I want the FX2LP processor to write the specified number of zeros (more than 64) to the FPGA. After much experimentation, I found that I can achieve this by clearing the EP2FIFOBUF to zero, then setting the GPIF transaction count (GPIFTCBx) to the desired count, and initiating a GPIF FIFO write transaction from EP2FIFOBUF. In the example below, 4000 zero bytes are written to the FPGA.
WORD byte_cnt;
byte_cnt = 4000;
memset(EP2FIFOBUF , 0, 64); // clear EP2FIFOBUF
OUTPKTEND = 0x2; // commit EP2 buffer to peripheral domain
SYNCDELAY;
GPIFTCB1 = byte_cnt>>8; // MSB of data count
SYNCDELAY;
GPIFTCB0 = byte_cnt; // LSB of data count
SYNCDELAY;
GPIFTRIG = GPIF_EP2; // launch GPIF FIFO WRITE Transaction from EP2 FIFO
SYNCDELAY;
while( !( GPIFTRIG & 0x80 ) ); // wait for GPIF Done bit
This seems to work, but I don't understand why. By experimentation I have found that when the data count is larger than 64, the 64th byte in EP2FIFOBUF (i.e. EP2FIFOBUF[63]) is repeatedly written to the FPGA. I would like to understand why this is working so that I can be assured that it is a reliable solution. I have not been able to find any information in the FX2LP documents to explain this behavior. I would appreciate if someone could provide some explanation.
Thanks.
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