USB low-full-high speed peripherals Forum Discussions
Our charger product is using the Cypress USB-Serial communication module to connect charger to PC for communication. We used the Cypress drivers and added USB PID/VID info into the drivers files in order for PC to recognize our chargers.
We are facing intermittent PC getting Blue Screen of Death (BSOD) when disconnecting USB cable from PC. The issue happened especially if the charger is connecting through a USB hub (Belkin).
Please advise any solution to solve the issue?
My PC is running on Windows 10 Professional.
We are use CY7C65211 on our system.
But our system has low power requirement for USB ports.
Does CY7C65211 meet below mention of LPM & BESL support?
Thanks,
Mitchell
Show LessHi,
Any timer effect on data transfer bandwidth?.
Hello.
I need to program CY7C64315 using just USB connector (D+ and D-).
Is it possible to connect ISSP DATA (P1_0) and ISSP CLOCK (P1_1) to USB line D+ and D-?
Any suggestion to do that?
I didn't connect for fear of chip damage.
I'll not use ISSP DATA (P1_0) and ISSP CLOCK (P1_1) as I/O in my project. They will be used only to program the chip.
Any advices are welcome.
Best Regards,
anne_4609456
Show LessIs there any USB microcontroller Full Speed at Cypress family where I can use the D+ and D- to program the firmware into the chip?
I need just 4 digital GPIO for my project, but its important to program the chip using USB conector (D+ and D-) as I did with Low Speed Encore II microcontroller.
Best Regards,
@anne_4609456
Hi,
We intended to configure CY7C65213 as self-powered mode. Other than the schematic connection shown below, the datasheet also says
"Using the configuration utility, the configuration descriptor in the
CY7C65213/CY7C65213A flash should be updated to indicate
that it is self-powered."
My question is: Can the internal flash be accessed and set after the circuit is connected this way? Especially the default power mode in the flash is bus-powered. Thanks.
How does the power mode in the flash affect the chip behavior? Is it just for information purpose, or it changes the chip's function?
Show Less
I am starting a new coding job with a new client.
The problem I am having is that a lot of issues with namespaces that can not be found or maybe missing directives or an assembly reference. This, I think, is a common thing. So I am wondering where I can download a free DLL from Microsoft that will do the trick and get me to compile my code. The class the code is using that the compiler does not like is "GeoPoint".
A quick search online offered using nuget to install the package Azure.Core.
So, how do I do this? I am using Microsoft Visual Studio Community 2019. I am looking for some direction. Please advise.
On my work computer, I went to https://azure.microsoft.com/en-us/downloads/ in my browser but it is blocked. So, I am assuming now that I have to use visual studio itself to add new assemblies instead of using a browser. Is that right or do I have to ask my administrator for access?
The page:
https://www.nuget.org/packages/Azure.Core/
offers me another hint with "Package Manager"
I found under Project->Manage Nuget Packages..." in visual studio but when i try to uplad a package I get an error message.
So, my manager said I fist need to download an assemply.
Please advise.
Show Less你好
我想在我的设计中使用2个端点。当我把 AN61345 - Source code ,FX2LP firmware中的SLAVE.C程序中的TD_init()函数中关于EP2的配置改为EP4时,传输的数据会发生错乱,这是什么原因呢?或者是我该参照哪些资料进行学习呢?
hi all,
我从笔记AN61345中给的实例出发,想把其中由EP2单端点输出改为由EP2和EP4双端点输出,(程序改动在下方详细说明)在进行调试时,发现EP4输出数据总是会出现问题。调试为单端点调试,即先让EP2进行输出(无问题),重新上电,在对EP4端口输出进行调试。其中已将FIFOADR进行更改。
程序改动说明:
1、 dscr.a51
HighSpeedConfigDscr:
db DSCR_CONFIG_LEN ;; Descriptor length
db DSCR_CONFIG ;; Descriptor type
db (HighSpeedConfigDscrEnd-HighSpeedConfigDscr) mod 256 ;; Total Length (LSB)
db (HighSpeedConfigDscrEnd-HighSpeedConfigDscr) / 256 ;; Total Length (MSB)
db 1 ;; Number of interfaces
db 1 ;; Configuration number
db 0 ;; Configuration string
db 10100000b ;; Attributes (b7 - buspwr, b6 - selfpwr, b5 - rwu)
db 50 ;; Power requirement (div 2 ma)
;; Interface Descriptor
db DSCR_INTRFC_LEN ;; Descriptor length
db DSCR_INTRFC ;; Descriptor type
db 0 ;; Zero-based index of this interface
db 0 ;; Alternate setting
db 3 ;; Number of end points 改动① 将端点数量 由 2改为3
db 0ffH ;; Interface class
db 00H ;; Interface sub class
db 00H ;; Interface sub sub class
db 0 ;; Interface descriptor string index
;; Endpoint Descriptor
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 02H ;; Endpoint number, and direction
db ET_BULK ;; Endpoint type
db 00H ;; Maximum packet size (LSB)
db 02H ;; Maximum packet size (MSB)
db 00H ;; Polling interval
;; Endpoint Descriptor 改动② 对端口4进行了配置
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 04H ;; Endpoint number, and direction
db ET_BULK ;; Endpoint type
db 00H ;; Maximum packet size (LSB)
db 02H ;; Maximum packet size (MSB)
db 00H ;; Polling interval
;; Endpoint Descriptor
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 86H ;; Endpoint number, and direction
db ET_BULK ;; Endpoint type
db 00H ;; Maximum packet size (LSB)
db 02H ;; Maximum packet size (MSB)
db 00H ;; Polling interval
HighSpeedConfigDscrEnd:
2、slave.C 仅仅对TD_init()进行了更改
void TD_Init( void )
{ // Called once at startup
CPUCS = 0x12; // CLKSPD[1:0]=10, for 48MHz operation, output CLKOUT
PINFLAGSAB = 0x98; // FLAGA - EP2EF 更改① FLAGB-EP4EF
SYNCDELAY;
PINFLAGSCD = 0xE0; // FLAGD - EP6FF
SYNCDELAY;
PORTACFG |= 0x80;
SYNCDELAY;
IFCONFIG = 0xE3; //Internal clock, 48 MHz, Slave FIFO interface
SYNCDELAY;
// IFCLKsrc=1 , FIFOs executes on internal clk source
// xMHz=1 , 48MHz operation
// IFCLKOE=1 ,Drive IFCLK pin signal at 48MHz
// IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk
// ASYNC=0 , master samples synchronous
// GSTATE=0 , Don't drive GPIF states out on PORTE[2:0], debug WF
// IFCFG[1:0]=11, FX2 in slave FIFO mode
// Registers which require a synchronization delay, see section 15.14
// FIFORESET FIFOPINPOLAR
// INPKTEND OUTPKTEND
// EPxBCH:L REVCTL
// GPIFTCB3 GPIFTCB2
// GPIFTCB1 GPIFTCB0
// EPxFIFOPFH:L EPxAUTOINLENH:L
// EPxFIFOCFG EPxGPIFFLGSEL
// PINFLAGSxx EPxFIFOIRQ
// EPxFIFOIE GPIFIRQ
// GPIFIE GPIFADRH:L
// UDMACRCH:L EPxGPIFTRIG
// GPIFTRIG
// Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
// ...these have been replaced by GPIFTC[B3:B0] registers
// EP4 and EP8 are not used in this implementation...
EP2CFG = 0xA2; //out 512 bytes, 2x, double
SYNCDELAY;
EP6CFG = 0xE2; // in 512 bytes, 2x, double
SYNCDELAY;
EP4CFG = 0xA2; //out 512 bytes, 2x, double 更改② 对EP4进行配置
SYNCDELAY;
EP8CFG = 0x02; //clear valid bit
SYNCDELAY;
SYNCDELAY;
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x02; // reset, FIFO 2
SYNCDELAY; //
FIFORESET = 0x04; // reset, FIFO 4
SYNCDELAY; //
FIFORESET = 0x06; // reset, FIFO 6
SYNCDELAY; //
FIFORESET = 0x08; // reset, FIFO 8
SYNCDELAY; //
FIFORESET = 0x00; // deactivate NAK-ALL
// handle the case where we were already in AUTO mode...
// ...for example: back to back firmware downloads...
SYNCDELAY; //
EP2FIFOCFG = 0x00; // AUTOOUT=0, WORDWIDE=1
// core needs to see AUTOOUT=0 to AUTOOUT=1 switch to arm endp's
SYNCDELAY; //
EP2FIFOCFG = 0x10; // AUTOOUT=1, WORDWIDE=0 更改③ EP2 WORDWIDE=0
SYNCDELAY; //
EP4FIFOCFG = 0x00; // AUTOOUT=0, WORDWIDE=0
// core needs to see AUTOOUT=0 to AUTOOUT=1 switch to arm endp's
SYNCDELAY; //
EP4FIFOCFG = 0x10; // AUTOOUT=1, WORDWIDE=1 更改4 EP4 进行了配置
SYNCDELAY; //
EP6FIFOCFG = 0x0D; // AUTOIN=1, ZEROLENIN=1, WORDWIDE=1
SYNCDELAY;
//JTAG Enable and SYNC signals for ZTEX Spartan 6 module 1.1 (FGPA+FX2LP setup)
OEA|=0x02; //Declare PA.1 as output
SYNCDELAY;
IOA|=0x02; //output 1 on PA.1
SYNCDELAY;
OEC|=0x01; //PC.0 as output (SYNC signal)
SYNCDELAY;
IOC|=0x00; //output 0 on PC.0...SYNC signal is LOW
SYNCDELAY;
OEC&=0xFD; //PC.1 as input (Clock changing signal)
SYNCDELAY;
}
Show LessHi,
In my application I use the CY7C65213 to communicate from the device to my receiver program.
When the device on the uart is sending data but the receiver isn't active. But becomes active after 1min I can receive data but the transmitted data isn't received by the de device on the uart side. I can see that my TX led remains low.
I need todo a chip reset to get this working again. How does this come? How can I fix this without doing a reset?
Kind regards,
Dieter
Show Less