USB low-full-high speed peripherals Forum Discussions
Hello
Thank you for any help you can provide. Presently we have the FX2 doing a boot loader from a large I2C EEPROM specifically an 24LC512 device from Microchip. That is located at address 1010001(A2=A1=0 and A0=1) as per the TRM. We also have another EEPROM sitting at address 1010101 for extra data store it is also a 24LC512. I would like to combine these two EEPROMs into an 24LC1025 device from Microchip. But this device only allows the setting of A1 and A0 and A2 is not setable. When you access the EEPROM you have to write a value into a Block bit to set whether you read from the upper half of the EEPROM or the lower half. So the address looks something like this 1010BA1A0 where in the setup above A1=0 and A0=1 => 1010B01. Unfortunately I do not think this will work for boot load applications. According to the TRM the FX2 on bootload checks the A2,A1,A0 bits to determine if there is an appropiate I2C EEPROM to boot from. I don't know how this plays with the 24LC1025 situation.
I didn't state above that we wanna boot load out of the EEPROM because we come up USB and enumarate to our own info.
So does anyone know if the FX2 can be setup to use the 24LC1025 or not and how.
Thanks
Gary
Show LessUsing 68013A 8bit synchronous slave FIFO interface.
EP2 as Hi-speed Bulk IN. FlagA - programmable FULL.
I use FPGA with ChipScope to test FlagA status.
Test: write enable = inactive, continuous clock at IFCLK. I see FlagA toggling. Seems that period proportional to clock period (tested with 33...6 MHz IFCLK). When reading BULK endpoint from CyConsole STALL reported. Reconnecting not help. Asynchronous FIFO interface work (at least no STALLs).
Any comments?
Show LessHi, I am trying implementing USB firmware to the application. My application generates 20 bytes of information every 10millisecond and transfers to XP Host PC. To try this option, took bulksrc example from demo kit and modified in following way:
* For this example I am using EP8IN
void TD_Init(void) // Called once at startup
{
// set the CPU clock to 48MHz
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
// set the slave FIFO interface to 48MHz
IFCONFIG |= 0x40;
// we are just using the default values, yes this is not necessary...
EP1OUTCFG = 0xA0;
EP1INCFG = 0xA0;
SYNCDELAY; // see TRM section 15.14
EP2CFG = 0xA2;
SYNCDELAY;
EP4CFG = 0xA0;
SYNCDELAY;
EP6CFG = 0xE2;
SYNCDELAY;
EP8CFG = 0xE0;
// out endpoints do not come up armed
// since the defaults are double buffered we must write dummy byte counts twice
SYNCDELAY;
EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip.
SYNCDELAY;
EP2BCL = 0x80;
SYNCDELAY;
EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip.
SYNCDELAY;
EP4BCL = 0x80;
// enable dual autopointer feature
AUTOPTRSETUP |= 0x01;
}
void TD_Poll(void) // Called repeatedly while the device is idle
{
static unsigned char txData = 0x41;
for (i=0;i<20;i++)
EP8FIFOBUF = txData;
SYNCDELAY;
EP8BCH = 0x00;
SYNCDELAY;
EP8BCL = 0x04;
txData++;
if(txData >= 0x5A)
txData = 0x41;
}
With this code I am able to simulate code successful under keil environment. After downloading hex file to EZ-USB controller, when I press “BulkTras” for pipe: 3:Endpoint 8 IN following results I will get:
0000 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41
0010 41 41 41 41
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42
0010 42 42 42 42
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 41 41 41 41 41 4A 4A 4A 4A
0010 4A 4A 4A 4A
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 58 58 58 58 58
0010 58 58 58 58
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 41 41 41 41 41 4F 4F 4F 4F
0010 4F 4F 4F 4F
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 58 58 58 59 59
0010 59 59 59 59
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 41 56 56 56 56 56 56 56 56
0010 56 56 56 56
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 58 58 58 58 58
0010 58 58 58 58
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 41 56 56 56 56 56 56 56 56
0010 56 56 56 58
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 58 58 58 58 58
0010 58 58 58 48
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 41 56 56 57 57 57 57 57 57
0010 57 57 57 57
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 58 58 58 58 58
0010 58 58 58 50
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 41 41 41 41 41 41 41 56 56 56 56 56 56 56 56 56
0010 56 56 56 56
Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000 42 42 42 42 58 58 58 58 58 58 58 49 49 49 49 49
0010 49 49 49 49
As per my code for every “BulkTrans” press, I suppose to get 41, 42, 43, 44, 45, 46, 47…like each byte 20 times.
What’s wrong I am doing at TDPOLL() function?
Appreciate your quick help.
Show LessHi,
I have already given a deep read into the TRM and the example by I still didn't managed to achieve what I want.
I'm trying to handle a control message which when detected, make an OUT packet by firmware. The first part is done. My control message is received in the right switch case. Let me just give a little context.
I need this case because i'm using several cores connected to the cypress and they are receiving simultaneous information thru OUT packets directly from the FIFO buffer (AUTOIN = 1). However, in Windows, bulk transfers are much more difficult to implement that the control transfer. So, in order to make use of the same process i have already used in the past with other USB chip (for the same kind of application), i'm trying this approach.
That is... i'm trying to form an OUT packet on the firmware side, by the time I get a certain control message, as I said before. Well.. this is the code i'm using to do it (EP2 is the OUT endpoint):
case SETUP_VENDOR_REQUEST:
{
if (SETUPDAT[1]==0x00)
{
unsigned int len = ((int)EP2BCH)<<8 | EP2BCL;
for(i=0; i<1024; i+=4)
{
*dest = 1;
*dest++;
*dest = 0;
*dest++;
*dest = 0;
*dest++;
*dest = 0;
*dest++;
}
EP2BCH = 3; SYNCDELAY;
EP2BCL = 0; SYNCDELAY;
}
}
break;
And this is the configuration for endpoint 2
// Configure EP2 (OUT) for bulk output, double-buffered (2*512 bytes).
EP2CFG = 0xa2; SYNCDELAY;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
FIFORESET = 0x82; SYNCDELAY; // Reset individual EP (2,4,6,8)
FIFORESET = 0x84; SYNCDELAY;
FIFORESET = 0x86; SYNCDELAY;
FIFORESET = 0x88; SYNCDELAY;
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
OUTPKTEND = 0x82; SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
// Configure EP2 for AUTOOUT, 16bit wide bus.
// EP2FIFOCFG = 0x11; SYNCDELAY;
EP2FIFOCFG = 0x01; SYNCDELAY; // now configured as AUTOOUT=0
// PORTACFG: FLAGD SLCS(*) 0 0 0 0 INT1 INT0
PORTACFG = 0x00; SYNCDELAY; // (delay maybe not needed)
It happens that the OUT packet seems that is never passed to the FIFO connected hardware.
What am I missing here?
Thx,
With my best regards,
Nuno
Show LessHi,
We are currently trying to get compliance for our USB3.0 device. On our board we have a slightly unorthodox implementation where our USB3.0 device is a TI PHY with an FPGA backend and the USB2.0 device is a completely separate FX2 chip. There are historical reasons for this.
I get 3 failures with the FX2 and they are as follows:
1. FX2 does not seem to support Link Power Management
2. There is no BOS descriptor
3. 'bcdUSB' field of the Standard Device Descriptor is set to 0x0200. This should be 0x02100 (ie., version 2.1 of the spec?)
Are there more up to date FX2 devices that will be compliant, or do I need to do a complete re-design for the USB2.0 part of our design?
Matt
Show LessDear All,
I have a problem about F/W code size. I use CY7C68013A and it has 16KB RAM. EEPROM is 24LC128 and its size is 16KB. When F/W code size is smaller than 8KB, everything is ok. When F/W code size is over 8KB, I use following command to generate iic file :
Hex2bix -V 0x04CA -P 0xAF10 -M 0x4000 -I -F 0xc2 -O AtPDCMFw.iic AtPDCMFw.hex
After I download iic file by CyConsole, the device appears as "Unknown USB device". But if I download hex file directly, the device is ok. What is the problem? Thanks~
Show LessI am using CyAPI.lib in my project Borland C++ Builder 6.
I have replaced my Borland C++ 6 by Borland C++ Builder 2009 but the library CyAPI.lib available in CY3684 EZ-USB FX2LP Development Kit doesn't work in Borland C++ Builder 2009. My project compil but not running.
This simple code generate error in Builder 2009 but not in Builder 6 : CCyUSBDevice* USBDevice = new CCyUSBDevice();
Is there a CY3684 EZ-USB FX2LP Development Kit available for Borland C++ Builder 2009 ?
Greg
Show LessDear experts
I am experiencing problems communicating with a 68013 from a uClinux environment on a BF548 EZKIT board. I make use of libusb as the underlying layer. The board has a USB2.0 OTG controller which has been configured as host. I do not have access to the 68013 code as it is from a third party vendor who cannot change it. I have succesfully downloaded the code using a libusb port of fxload. When the controller switches into its new configuration, I try to do bulk reads from endpoint 84. With exactly the same code, I succeed on a Windows machine (using libusb-win32) and on a Suse Linux box. On the embedded board, the reads return a 1 byte 0 all the time. I know this points to inconsistencies on the hardware level - but I really dont know what to do anymore. Has anyone succeeded in getting FX2 bulk reads working in an embedded environment?
The USB descriptor after configuration is:
Dev #119: 1512 PIPE PROFILER v1.0 - MARINE ELECTRONICS 1512
wTotalLength: 60
bNumInterfaces: 1
bConfigurationValue: 1
iConfiguration: 0
bmAttributes: a0h
MaxPower: 50
bInterfaceNumber: 0
bAlternateSetting: 0
bNumEndpoints: 6
bInterfaceClass: 255
bInterfaceSubClass: 0
bInterfaceProtocol: 0
iInterface: 0
bEndpointAddress: 81h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
bEndpointAddress: 01h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
bEndpointAddress: 02h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
bEndpointAddress: 84h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
bEndpointAddress: 86h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
bEndpointAddress: 88h
bmAttributes: 02h
wMaxPacketSize: 64
bInterval: 0
bRefresh: 0
bSynchAddress: 0
The simplified program is as follows (after configuration - I use a usb_reset and usb_close after configuring):
dh = usb_open(dev);
#if
defined(LIBUSB_HAS_GET_DRIVER_NP)
#if
printf("Seeing if a driver has claimed the interface");
printf("interface %i already claimed by %s - will try detach",0,name);
printf("%s\n", usb_strerror());
}
defined(LIBUSB_HAS_DETACH_KERNEL_DRIVER_NP)if (LIBUSBLOG_usb_get_driver_np(dh, 0, (char *) name, sizeof(name)) == 0) {if (LIBUSBLOG_usb_detach_kernel_driver_np(dh, 0) < 0) {return;}
res = usb_set_configuration(dh,1);
Also included are transaction logs using a usbmon program from the blackfin BF548 and Suse
#endif
#endif
Show LessFunction HANDLE CCyUSBDevice::DeviceHandle() from library CyAPI.lib for Borland C ++ Builder 6.0 (c:\Program Files\Cypress\Cypress Suite USB 3.4.2\CyAPI\lib\BC6\CyAPI.lib) returns wrong value.
Possibly returns hDevNotification.
In earlier versions of library (FX2LP DVK 1004) function DeviceHandle() works correctly.
Hi,
My design uses FX2LP chip, with 3.3V power for the FX2LP supplied externally.
Everything works well except, the FiishDataXfer function crashes if I turn the power off to the device. If I pull the USB cable, it doesn't crash. Is there anyway I can determine the power failure event? There is no possible way to change the design at this stage. I appreciate if someone can direct me in the right direction.
I am using Visual C++ to do the application.
Thanks,
Tharaka.
Show Less