USB low-full-high speed peripherals Forum Discussions

 After a renumeration, the FX2 often starts with the FULL flags asserted in the EPxCS registers, despite the usual collection of FIFORESET assertions.

NPAK status for EP2 is 010, and for EP4 10. The others I am not interested in.

This happens, despite the EPxFIFOBCL registers correctly reporting 0 bytes.

From a cold boot, this does not occur.

Is there anyway to force the FULL flag to be deasserted after renumeration?

Am I also correct in assuming that this FULL flag is why I am unable to send data to the endpoints from the host (timeout instead)? 

 Hi,

Is anyone on this forum an expert in developing Windows driver software that interfaces with the Cypress FX2?  Or possibly someone could recommend somebody?  We currently have a working driver but are running into compatibility issues depending on the version of Windows and the client's configuration.  Possibly we need to go through WHQL testing to handle this.  If there is someone with experience in this area please let me know.

Thanks!

Aaron

my chip is 68013A ,ep 2 IN,bulk,512 * 4.

My code:

void TD_Init(void)             // Called once at startup
{
   // set the CPU clock to 48MHz
   CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
    // set the slave FIFO interface to 48MHz and work in the slave FIFO
    SYNCDELAY;
    IFCONFIG = 0xc3;

 SYNCDELAY;
 REVCTL |= 0x03; // REVCTL.0 and REVCTL.1 set to 1
 SYNCDELAY;                    // see TRM section 15.14
   EP2CFG = 0xe8;
// SYNCDELAY;
// FIFORESET = 0x80; // Reset the FIFO
    SYNCDELAY;
   EP2FIFOCFG |= 0x08;
 SYNCDELAY;
    FIFOPINPOLAR |= 0x04; //set valid active high
 SYNCDELAY;
   EP2FIFOCFG &= ~0x01;

 //init EP2 ram
   SYNCDELAY;                   
   EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
   SYNCDELAY;                   
   EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
 SYNCDELAY;                   
   EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
 SYNCDELAY;                   
   EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.

   // enable dual autopointer feature
   AUTOPTRSETUP |= 0x01;
}

void TD_Poll(void)              // Called repeatedly while the device is idle
{
 IFCONFIG = 0x03;
}

questions as follows:

1,cann't set IFCONFIG = 0x03 in the TD_Init(); when I set it in the TD_Init(),68013 can work normal.

    so I set IFCONFIG in the TD_Poll(void)  .

   buf I want to know why it cann't work in the TD_Init();

2,68013 cann't set 1024 * 4.why?

3,when arm read 68013's FIFO ,sometimes drop packet.

   my logic is :    tuner -> 68013 -> arm.

  tuner data is 5M byte per second send to 68013,and arm read 68013  in usb high speed.

 but it alwayes drop,and Fullflag sometimes is low.

  how to do?

 and iso is more good then bulk?

Hi,

We have a design with an FX2 (CY68013A) and an FPGA. We use the Slave FIFO interface and are mainly interested in high OUT throughput.

I currently have around 27 MB/s but the screamer example says it can do 32 MB/s. On the PC side I already have everything as in the screamer example, I think.

I use a programmable flag for almost empty so I can keep SLRD active continuously for most of the transfer between FX2 and FPGA.

I'm using 4x 512 Bulk mode on EP2 and EP6.

I'm using an external IFCLK running at 40MHz.

Where should I look for improvement? Internal instead of external IFCLK? Faster IFCLK?

I also found out that when I use two devices the combined throughput can go up to 41 MB/s. Why can't a single FX2 get this bandwidth?

Any help is appreciated,

Maarten

I managed to get the application talking to the hardware somewhat correctly.  (I have a few quirks, but I'm not chasing those right now.)  We switched direction from another USB solution to a high speed device because of the frame timing.  The system has very low data rates overall (most packets are only a few bytes at a time and not that frequent), but a full speed solution was not working.  With the device I tested (DevaSys card), the delays in the system were 10-20 times slower than with the old ISA interface.  Whe I looked at bus timing, the frames were 4ms.

I researched frame timing and found that high speed is supposed to have 125us subframes.  With that kind of timing, I should be able to get the system working about the same speeds as ISA with possibly a few non-critical areas being a little slower.

In the initialization code the software does a send and recieve of one byte through a range of 256 possible addresses in the external chassis (it's looking to see what hardware is installed in the chassis).  It does this in a tight for loop that has about 15 us per I/O call when using the ISA card.  This is not a critical part of the program and I left it as is to compare timing between interfaces (I plan to move the polling to firmware eventually and just read all 256 bytes in one Bulk transfer, but that's phase II).

Looking at the traffic with a logic analyzer, I'm seeing per transaction timings of 3-4ms, not 125us.  What could be causing the timing to be 24-32 times slower than expected?  I find it interesting that the bus timing is almost identical to what I saw with the full speed device we rejected.

I am doing all I/O via control endpoint transfers at the moment.  Many times I need to write a couple of bytes and then immediately read one or two.  The bidirectionality of the control endpoint enables me to combine these into one USB call.

What is causing this and how to I fix it?

Bill

hi all, i am doing some time-critical data transfer on EZ-USB FX2LP(cy68013a)

I use the isochronous mode, maxPacketSize = 1024, 1 transaction per uframe( 1/8 ms);

now i want to transfer data every ms,  so i should set the xfer size = 8KB

that is the outlen = 8*1024.

If it works as i think, i should get the 8KB data in 1ms, but it  costs about 5ms to do that.

and if i setup to get  1024KB data in 128ms, it costs about 132 ms.

Since what i am doing is time-critical, i have to find out the reason. Have you guys any idea about it?

 Here is the code:

    QueryPerformanceCounter(&lPerformanceCount_Start);
    UCHAR  *inContext = dlg->USBDevice->IsocInEndPt->BeginDataXfer(inData,inlen,&inOvLap);
  if(!dlg->USBDevice->IsocInEndPt->WaitForXfer(&inOvLap,150))
  {
     
    AfxMessageBox("Time out!");
    dlg->USBDevice->IsocInEndPt->Abort();
    WaitForSingleObject(inOvLap.hEvent,INFINITE);
}
   
    success = dlg->USBDevice->IsocInEndPt->FinishDataXfer(inData, inlen, &inOvLap,inContext,
                  isoPktInfos);
    
    QueryPerformanceCounter(&lPerformanceCount_End);

Hi all,  I cannot find the effective way to flush the data in the IN endpoint of Cy68013a.

I set the EP2IN: bulk mode, 512byte x 4. Everytime I want to read the incoming data, I have to read out the remain 2k byte data in the endpoint first. Is there any to flush the remain data?  So I can get the data I want without reading the first 2k byte data.

I've tried to download Virtual COM port example but it won't load WinXP driver.

Device enumerates (seemingly) correctly and then prompts for driver. I've pointed to the attached INF file, but WinXP can't load the driver. It's visible in the device manager as unknown(other) device.

Did anyone tried to test it? I've checked on two PC's - the same result...