USB low-full-high speed peripherals Forum Discussions

Hello,

I have the following issue with an USB device working with a Cypress FX2LP: depending on the USB port and the OS (happens mostly on Windows XP SP3), the device fails to recover from the hibernate mode. When the PC exits from the hibernate mode, the device is still recognized by the device manager but the soft I developed (in C++)  to manage the device won't reconnect to it.

In the software the communication with the USB driver is managed by Windows (through the method DeviceIOControl). At the exit of hibernate mode, the DeviceIOControl function doen't seem to get any answer from the FX2 (no byte received when sending a command). I tried as well to ask for a reset directly to the cypress driver via the CyUSBDriver class (CyAPI.h), but it didn't work either.

Do you have any knowledge of methods or functionalities of the FX2 that would manage a proper recovering from hibernate mode? Perhaps would it be better not to use the Windows access to the usb driver?

 I hope I was clear enough. Don't hesitate to ask for further information or explanation.

Thank you for your answer,

Valentin

Hello!

I want to design a programmer for programming hearing aids.I want to use CY7C64713-128AXC

Suggest me a suitable PCB Desing Software please!

Thank you!

Rumen

 Hello,

I have the CY3684 kit that i am using as a starting point for implenting the cy7c8013a into our custom boards.

I am trying to load the ledcycle.hex provided with install into the large EEPROM using hex2bix.exe. When I load the hex file it works fine, but when I try to load it from the EEPROM, it's not enumerating.

Here's the command i am using:

hex2bix ledcycle.hex -o ledcycle.iic -f 0xc2 -i

Eventually, I'd like to get to insert a different VID/PID.

Thanks for the help.

 Hi

If I have the following inside my INF

[Install.CyUSB.AddReg.Guid]

HKR,,DriverGUID,,"{AE18AA60-7F6A-11d4-97DD-00010229B959}"

Then suiteUSB can see my device no problem. 

But my understanding was that I could change that GUID to ensure that other programs using the same GUID could not update the driver I am using.

But when I change the GUID, SuiteUSB cannot see my device any longer. I've tried using SetCustomerGUID and SetClassGUID, but they don't seem to work.

If I delete the lines above from my INF it still works. But if I change the GUID, it stops working.

So, my question is: Is SuiteUSB able to work with GUIDs other than the '959 shown above? The article "How does the CyUSB.dll recognize a cypress device" seems to suggest "yes", but the paragraph is poorly written and the grammar unclear exactly what they mean.

http://www.cypress.com/?id=4&rID=35281

Hello!     I'm new in the forum.I want to do a project programmer CY764713-128AXC.Unfortunately I did not find CY7C64713-128 AXC in to the  library of  the  PCoC2 Creator! Help please!
 

 I'm currently designing a low cost development board around the PSoC III series. I'd like to include an embedded programmer and debugger, such as that on the First Touch development board.

The First Touch board has an EZ-USB FX2LP (the CY7C68013A-56LTXC) onboard, but this chip seems significantly overspecced for the task - and it's expensive: more expensive than much of the PSoC III processors!

What I'd like to do is implement a USB to SWD interface on a much cheaper microcontroller. I'd also like it to include another endpoint for a UART for user communication with the main PSoC processor.

Would this be practical on an enCoRe III or enCoRe V USB MCU, such as the CY7C64343-32LQXC or the CY7C64215-28PVXC?

Also, is the source for the programmer used on the First Touch board available anywhere?

68013 works as a slavefifo with ep6 = bulk endpoint 512*2B buffer in a autoin mode;

fpga send data to 68013 with a 16bit self-increment data(0x0000-0xffff)@5MHz ifclk,but the 'slwr' and the 'fdata[15-0]' bus are only active during the cnt register is from 0-63,when cnt is 64-311 ,slwr<='1'; the cnt register trigers each clk_5M edge.so the data rate is actually 2MB/s.

the problem is that when we use the VC software we build with the cyapi(begin, wait, finish in a thread)  to write the data into a txt file,we found that there would be some repeated data error as u can see in the attach file(2.txt). the err mostly appear when the last data is  0x3FFF, and the next one should be 0x4000,but always appear to be 0x8000,but after 512 0x80xx, it appears to turn back to 0x4100, so i believe that the fpga send the data correctly, but the slave fifo or the SIE may have some proble. (btw: if ifpga send data in 0-15 and when 16-311slwr<='1' then no error occurred, means if low the  data rate to 0.5MB/s the system works well)

we believe that this is far from the max rate about 40MB/s talked in other thread. we also tested our board with the Cystreamer and got a perfect 35MB/s rate. we wonder why we meet such a problem. thx a lot!

the firmware and the fpga vhdl file are in the attachments

68013 works as a slavefifo with ep6 = bulk endpoint 512*2B buffer in a autoin mode;

fpga send data to 68013 with a 16bit self-increment data(0x0000-0xffff)@5MHz ifclk,but the 'slwr' and the 'fdata[15-0]' bus are only active during the cnt register is from 0-63,when cnt is 64-311 ,slwr<='1'; the cnt register trigers each clk_5M edge.so the data rate is actually 2MB/s.

the problem is that when we use the VC software we build with the cyapi(begin, wait, finish in a thread)  to write the data into a txt file,we found that there would be some repeated data error as u can see in the attach file(2.txt). the err mostly appear when the last data is  0x3FFF, and the next one should be 0x4000,but always appear to be 0x8000,but after 512 0x80xx, it appears to turn back to 0x4100, so i believe that the fpga send the data correctly, but the slave fifo or the SIE may have some proble. (btw: if ifpga send data in 0-15 and when 16-311slwr<='1' then no error occurred, means if low the  data rate to 0.5MB/s the system works well)

we believe that this is far from the max rate about 40MB/s talked in other thread. we also tested our board with the Cystreamer and got a perfect 35MB/s rate. we wonder why we meet such a problem. thx a lot!

the firmware and the fpga vhdl file are in the attachments

Can someone please share with me the maximum throughput they've been able to achieve using the CY7C67300?  I would like to confirm that there is indeed a good solution waiting out there for me to find it.  I call this "confirming that the pot of gold is indeed a the end of the rainbow," before I go searching (R&D).

Specifically, I'm using the CY7C67300 in a standalone mode, providing USB Host support to a PSoC5.  I need to STREAM 32,000 bytes per second into a file I write to a USB Flash Drive.   So far, communication timing issues limit me to 4452 Bps.

Thanks,
Helmut

...

My main question is above, but here's some additional info.  Perhaps you're interested in reading it and commenting.

First, prior experience writing to a FAT file system on SD card educated me about a couple things.  The traditional fileio.c code reads a block before writing it, even if you're writing a whole block.  This was very wasteful.  In the past, I modified the fileio.c to have what today I'll call a streaming mode, where I bypassed the initial block read (per a global flag, argh!) when writing this stream.  In addition, I found that when a cluster got full and a new cluster needed to be allocated, the code spent "forever" handling the file allocation table and such.  I had to simply make sure I was faster than my needed average speed, and then had a buffer large enough to handle the pause that occurs during cluster allocation.  

Second, current experience divides the PSoC5-SPI-CY7C67300 communication into three levels, based on support code from AN15484.  High level "command" operations are self-timed by waiting on the GPIO25 interrupt.  Mid level "transaction" operations are self-timed by waiting on the GPIO24 interrupt.  Low level "byte" transfers must be both separated and followed as a group by arbitrary delays.  This is "nasty" and not well behaved.  This is why I can't get beyond 4452 Bps (B/sec).  Meanwhile, my PC can write the same flash drive at about 6.7 MB/sec, so I know it's not the flash drive.  Do you have any insight or advice on this?

Third, I've been doing all this from the AN15484 app note and using it's pre-compiled support code in the CY7C76300.  I have not yet studied the CY7C76300 datasheet or looked for technical manuals on this chip.  My custom board design was derived from the app note as well, so I didn't really need to consult the datasheet much at all.  So, any advice on where to find such technical manuals?  The chip product page doesn't lead to much of use for this purpose, other than the CY4640 reference design.  Looking again at that right now, I see the installed Docs folder.  I don't immediately find much "overview".  I do read in the datasheet that SPI can use DMA and up to 2Mbps slave clock, both germane.  I don't find anything else about SPI communications.

Thanks very much,

Helmut