USB low-full-high speed peripherals Forum Discussions
Hi,
Are there any examples or instructions for programming the EEPROM for old FX chips (eg CY7C64613) through the CYUSB driver? I have the Cypress Suite USB but that only deals with the FX2 EEPROM.
I have an old app that does it through the EZUSB driver using IOCTL_EZUSB_ANCHOR_DOWNLOAD and IOCTL_EZUSB_VENDOR_OR_CLASS_REQUEST with a Vend_Ax.hex file and I'm trying to work out what the equivalent steps are for the CYUSB driver.
Thanks.
Show LessHi,all
MPEG2-TS------>CY7c68013------>PC
recently,i am doing a job which mpeg2-Ts stream Transferred to a computer.i used cy7c68013a-56 chip,endpoint2 bulk in 4xbuffer.Frimware,i reference to http://www.cypress.com/?rID=39714
my question is:
When I received the usb pass over the data and stores it into a TS file, i found about 1/3 data lost.
Driver: ezusb.sys
frimware:
CPUCS = 0x10; // CLKSPD[1:0]=10, for 48 MHz operation
SYNCDELAY;
REVCTL=0x03;
IFCONFIG = 0xCB; // IFCLK Source internal (i.e.) Gated MPEG_CLK, MPEG_CLK is connected to SLWR
// FX2LP in SLAVE FIFO Mode
SYNCDELAY;
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x82; // reset, FIFO 2
SYNCDELAY; //
FIFORESET = 0x84; // reset, FIFO 4
SYNCDELAY; //
FIFORESET = 0x86; // reset, FIFO 6
SYNCDELAY; //
FIFORESET = 0x88; // reset, FIFO 8
SYNCDELAY; //
FIFORESET = 0x00; // deactivate NAK-ALL
SYNCDELAY;
PINFLAGSAB = 0x00; //
SYNCDELAY;
PINFLAGSCD = 0x00; //
SYNCDELAY;
PORTACFG = 0x00; //
SYNCDELAY;
FIFOPINPOLAR = 0x04; // SLWR is configured as active HIGH : Can be changed to 0x00 for SLWR to be active Low
SYNCDELAY;
EP2CFG = 0xE0; // VALID - 1,DIR - IN,Type- Bulk, Size - 512 Bytes, Quad Buffered
SYNCDELAY;
EP4CFG = 0x00; // clear valid bit
SYNCDELAY; //
EP6CFG = 0x00; // clear valid bit
SYNCDELAY; //
EP8CFG = 0x00; // clear valid bit
SYNCDELAY;
EP2FIFOCFG = 0x08; // AUTO IN, NO Zero Length Packets, 8- bit Wide
SYNCDELAY;
EP2AUTOINLENH = 0x02; // Auto-commit 512-byte packets
SYNCDELAY;
EP2AUTOINLENL = 0x00;
SYNCDELAY;
OEA |= 0x30;
IOA &= ~20;
I beg your reply......
Hi all,
i found this document from one of the tech support team. This document has details of common problems with drivers available with FX2LP.
Show LessI have a problem with a CyStream based device that uses GPIF for a long time. The problem is as follows:
We use an FX2 as a streaming device connected to either an ADC or an FPGA.
With the standard CyStream example code, no GPIF is used, however we use GPIF to interface to the ADC/FPGA.
Becasue it is a streaming device data is continuously aquired without any 8051 code in the data-loop.
The GPIF is a effectively just a simple Data-active cycle which is looped continuously and is aborted with GPIFABORT.
The streaming works perfectly until I set GPIFABORT to 0xff and try to restart the
waveform.
Below you can find Td_Init and the code to start and stop the stransfer (not TD_Poll isn't doing anything).
I hope someone can help with this problem. If any new info is required please let me know.
Best regards,
Peter
void TD_Init(void) // Called once at startup
{
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
REVCTL = 0x03;
SYNCDELAY;
EP1OUTCFG = 0xA0;
SYNCDELAY;
EP1INCFG = 0xA0;
SYNCDELAY;
EP2CFG = 0xA0;
SYNCDELAY;
EP4CFG = 0xA0;
SYNCDELAY;
EP6CFG = 0xE0;
SYNCDELAY;
EP8CFG = 0x00;
SYNCDELAY;
// Reset ALL fifo's
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = 0x02;
SYNCDELAY;
FIFORESET = 0x04;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x08;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
EP2FIFOCFG = 0x00;
SYNCDELAY;
EP4FIFOCFG = 0x00;
SYNCDELAY;
EP6FIFOCFG = 0x0C;
SYNCDELAY;
EP8FIFOCFG = 0x00;
SYNCDELAY;
TOGCTL = 0x16; // EP6 IN
TOGCTL = 0x36; // EP6 IN Reset
AUTOPTRSETUP |= 0x01;
Rwuen = TRUE;
GpifInit();
IFCONFIG &= ~(0x60);
}
StartTransfer()
{
GPIFABORT = 0xFF;
while( !( GPIFTRIG & 0x80 ) )
{
;
}
EP6FIFOCFG = 0x00;
SYNCDELAY;
EP6FIFOCFG = 0x0C;
SYNCDELAY;
EP6GPIFFLGSEL = 0x02;
SYNCDELAY;
GPIFTRIG = GPIFTRIGRD | GPIF_EP6;
SYNCDELAY;
GPIFREADYCFG |= 0x80; // This will start the GPIF
SYNCDELAY;
}
EndTransfer()
{
GPIFABORT = 0xFF;
while( !( GPIFTRIG & 0x80 ) )
{
;
}
}
Show Less
Hi,
is it possible to have a OUT transfer (from host to device) to a large endpoint (2,4,6 or 😎 with a size less of 512 byte?
Regards,
Begos
Show LessHi,
I am developing with Windows 7 - 32 bit. I am using CyApi with CY68013A. Can I use CyApi transfer functions ( p.e. XferData..) from two thread without mutex or semaphore, or I need to protect every call with mutex or other?
Thanks
Begos
Show LessI purchased a CY763813-PXC and I wish to program it. I have no trouble making a programmer myself so I want to do that. However there is one issue: I cannot find the specifcations for the chip to program it. The closet thing that I could find is this http://www.cypress.com/?docID=41612 however nowhere is the CY7C638xx family mentioned. The datasheet for the family on brifly mentions this topic. The datasheet that I am working from was obtained from here http://www.cypress.com/?rID=14212
The enCoRe II devices enable this type of in system
programming by using the D+ and D– pins as the serial
programming mode interface. This allows an external controller to enable the enCoRe II part to enter the serial programming
mode, and then use the test queue to issue flash access
functions in the SROM. The programming protocol is not USB.
Now the question is how do I get into test queue?
Also right on the first page of the family datasheet it says "Industry standard programmer support" but what standard?
If anyone has more information on the protocol to program this chip please do tell.
Show LessHi,
What is the status of CY7C64613 microcontroller? It is not present on obsolete products list. It is not listed on product page. I found link to DS in (ID: kku03021901) post but it doesn't work.
If this is obsolete can you recommend replacement with similar or the same functionality?
Thank you in advance,
Show Less